公开(公告)号：US20240187017A1

公开(公告)日：2024-06-06

申请号：US18523559

申请日：2023-11-29

Applicant: ROHM CO., LTD.

Inventor： Ryoichi KUROKAWA

IPC: H03M1/46

CPC classification number: H03M1/466

Abstract: A successive approximation type A/D conversion circuit includes a capacitor type DAC and configured to convert an analog input signal into a digital output signal, and the capacitor type DAC includes a capacitor array including a plurality of capacitors, and a switch array configured to selectively apply a first reference voltage, a second reference voltage higher than the first reference voltage, or the analog input signal individually to a first end of each of the plurality of capacitors, one or more capacitors among the plurality of capacitors belonging to a first type capacitor, the other capacitors among the plurality of capacitors belonging to a second type capacitor, a second end of the first type capacitor being connected to a first signal wiring, and a second end of the second type capacitor being connected to a second signal wiring.

公开(公告)号：US20240186997A1

公开(公告)日：2024-06-06

申请号：US18525125

申请日：2023-11-30

Applicant: ROHM CO., LTD.

Inventor： Koji SAITO ,  Ryoichi KUROKAWA

IPC: H03K17/687 ,  H03K5/01

CPC classification number: H03K17/6871 ,  H03K5/01

Abstract: A voltage generation circuit includes: a first MOSFET including a source, a back gate, and a gate connected to a first node, and a drain connected to a first potential end; a front-stage transistor circuit including one or more second MOSFETs and connected between the first node and a second potential end; a third MOSFET including a source and a back gate connected to a second node, a gate connected to the first node, and a drain connected to the first potential end; and a rear-stage transistor circuit including one or more fourth MOSFETs and connected between the second node and the second potential end, wherein the first and third MOSFETs each have characteristic of being in a conductive state when gate-source voltage is 0 V, and wherein the second and fourth MOSFETs each have characteristic of being in a cut-off state when gate-source voltage is 0 V.

公开(公告)号：US20230155603A1

公开(公告)日：2023-05-18

申请号：US17986362

申请日：2022-11-14

Applicant: Rohm Co., Ltd.

Inventor： Koji SAITO ,  Ryoichi KUROKAWA

IPC: H03M1/46 ,  H03M1/12

CPC classification number: H03M1/468 ,  H03M1/1255

Abstract: An AD converter includes: a DA converter; a comparator configured to be capable of resetting a comparison output signal to a first level after a comparison operation is performed based on an output of the DA converter and before a next comparison operation is performed; a level shifter configured to be capable of level-shifting and outputting the comparison output signal such that a change from the first level to a second level is faster than a change from the second level to the first level; a register configured to be capable of obtaining the output of the level shifter; and a logic circuit configured to be capable of controlling the DA converter.