RECEIVER GAIN ADJUSTMENT TO REDUCING AN INFLUENCE OF A DC OFFSET
    1.
    发明申请
    RECEIVER GAIN ADJUSTMENT TO REDUCING AN INFLUENCE OF A DC OFFSET 有权
    接收机增益调整以减少DC偏移的影响

    公开(公告)号:US20130251078A1

    公开(公告)日:2013-09-26

    申请号:US13990620

    申请日:2010-11-30

    IPC分类号: H04L25/06 H03M1/18

    摘要: The invention refers to generating a digital signal from an analog signal, wherein the analog signal is amplified according to a gain control value before being converted to a digital value by means of an analog-to-digital converter, wherein a DC offset value of the analog signal is determined, and the gain control value is generated as a function of the dynamic range of the analog-to-digital converter and the DC offset value. The invention further refers to a corresponding circuit and a computer program.

    摘要翻译: 本发明涉及从模拟信号产生数字信号,其中模拟信号在通过模数转换器转换成数字值之前根据增益控制值进行放大,其中DC偏移值 确定模拟信号,并且根据模数转换器的动态范围和DC偏移值产生增益控制值。 本发明还涉及相应的电路和计算机程序。

    Receiver gain adjustment to reducing an influence of a DC offset
    2.
    发明授权
    Receiver gain adjustment to reducing an influence of a DC offset 有权
    接收机增益调整,以减少直流偏移的影响

    公开(公告)号:US09124467B2

    公开(公告)日:2015-09-01

    申请号:US13990620

    申请日:2010-11-30

    摘要: The invention refers to generating a digital signal from an analog signal, wherein the analog signal is amplified according to a gain control value before being converted to a digital value by means of an analog-to-digital converter, wherein a DC offset value of the analog signal is determined, and the gain control value is generated as a function of the dynamic range of the analog-to-digital converter and the DC offset value. The invention further refers to a corresponding circuit and a computer program.

    摘要翻译: 本发明涉及从模拟信号产生数字信号,其中模拟信号在通过模数转换器转换成数字值之前根据增益控制值进行放大,其中DC偏移值 确定模拟信号,并且根据模数转换器的动态范围和DC偏移值产生增益控制值。 本发明还涉及相应的电路和计算机程序。

    Micro sleep mode control for a receiver

    公开(公告)号:US09775109B2

    公开(公告)日:2017-09-26

    申请号:US13878798

    申请日:2010-10-12

    IPC分类号: G08C17/00 H04W52/02

    摘要: A technique for controlling a receiver to enter a micro sleep mode during which at least one receiver component is temporarily switched off is described. The receiver is configured to process sub-frames each having a first sub-frame portion followed by a second sub-frame portion, the first sub-frame portion carrying information indicative of whether or not the second sub-frame portion needs to be decoded. A method implementation of this technique comprises the steps of providing a regular micro sleep mode in which the receiver component is switched off after the first sub-frame portion has been decoded in case the decoding indicates that the second sub-frame portion does not need to be decoded, providing an extended micro sleep mode in which the receiver component is switched off immediately after the first sub-frame portion has been received, evaluating a mode setting criterion, and controlling the receiver to enter the regular micro sleep mode or the extended micro sleep mode depending on the mode setting criterion.

    Micro Sleep Mode Control For a Receiver
    4.
    发明申请
    Micro Sleep Mode Control For a Receiver 有权
    接收器的微型睡眠模式控制

    公开(公告)号:US20130194995A1

    公开(公告)日:2013-08-01

    申请号:US13878798

    申请日:2010-10-12

    IPC分类号: H04W52/02

    摘要: A technique for controlling a receiver to enter a micro sleep mode during which at least one receiver component is temporarily switched off is described. The receiver is configured to process sub-frames each having a first sub-frame portion followed by a second sub-frame portion, the first sub-frame portion carrying information indicative of whether or not the second sub-frame portion needs to be decoded. A method implementation of this technique comprises the steps of providing a regular micro sleep mode in which the receiver component is switched off after the first sub-frame portion has been decoded in case the decoding indicates that the second sub-frame portion does not need to be decoded, providing an extended micro sleep mode in which the receiver component is switched off immediately after the first sub-frame portion has been received, evaluating a mode setting criterion, and controlling the receiver to enter the regular micro sleep mode or the extended micro sleep mode depending on the mode setting criterion.

    摘要翻译: 描述了一种用于控制接收机进入暂时关闭至少一个接收器组件的微睡眠模式的技术。 接收器被配置为处理每个具有第一子帧部分和第二子帧部分的子帧,第一子帧部分承载指示第二子帧部分是否需要被解码的信息。 该技术的方法实现包括以下步骤:提供常规微睡眠模式,其中在第一子帧部分被解码之后接收器组件被关闭,在解码指示第二子帧部分不需要 解码,提供扩展的微睡眠模式,其中接收器组件在接收到第一子帧部分之后立即被切断,评估模式设置标准,并且控制接收机进入常规微睡眠模式或扩展微型 睡眠模式取决于模式设置标准。

    Control of a digital radio frequency interface
    5.
    发明授权
    Control of a digital radio frequency interface 有权
    数字射频接口的控制

    公开(公告)号:US09054744B2

    公开(公告)日:2015-06-09

    申请号:US13142440

    申请日:2009-12-16

    申请人: Steffen Reinhardt

    发明人: Steffen Reinhardt

    IPC分类号: H04L27/00 H04B1/00 H04B1/40

    CPC分类号: H04B1/0003 H04B1/40

    摘要: A control entity (100) for a communication device (110) and for communicating in accordance with a Digital Radio Frequency interface using a sequence of layers including a physical layer (102), a protocol layer (104) and a programming model layer (106), the control entity (100) comprising an interface control unit (108) implementing an interface control sub layer of the programming model layer (106) and adapted for controlling the protocol layer (104) and the physical layer (106), and a configuration interface (112) communicatively coupled to the interface control unit (108) and adapted for enabling an operator to configure a timing of control commands for controlling the control entity (100).

    摘要翻译: 一种用于通信设备(110)并用于使用包括物理层(102),协议层(104)和编程模型层(106)的层序列的数字射频接口进行通信的控制实体(100) ),所述控制实体(100)包括实现所述编程模型层(106)的接口控制子层并适于控制所述协议层(104)和所述物理层(106)的接口控制单元(108),以及 配置接口(112),其通信地耦合到所述接口控制单元(108)并且适于使得操作者能够配置用于控制所述控制实体(100)的控制命令的定时。

    Control of a Digital Radio Frequency Interface
    6.
    发明申请
    Control of a Digital Radio Frequency Interface 有权
    数字射频接口的控制

    公开(公告)号:US20110286547A1

    公开(公告)日:2011-11-24

    申请号:US13142440

    申请日:2009-12-16

    申请人: Steffen Reinhardt

    发明人: Steffen Reinhardt

    IPC分类号: H04L27/00

    CPC分类号: H04B1/0003 H04B1/40

    摘要: A control entity (100) for a communication device (110) and for communicating in accordance with a Digital Radio Frequency interface using a sequence of layers including a physical layer (102), a protocol layer (104) and a programming model layer (106), the control entity (100) comprising an interface control unit (108) implementing an interface control sub layer of the programming model layer (106) and adapted for controlling the protocol layer (104) and the physical layer (106), and a configuration interface (112) communicatively coupled to the interface control unit (108) and adapted for enabling an operator to configure a timing of control commands for controlling the control entity (100).

    摘要翻译: 一种用于通信设备(110)并用于使用包括物理层(102),协议层(104)和编程模型层(106)的层序列的数字射频接口进行通信的控制实体(100) ),所述控制实体(100)包括实现所述编程模型层(106)的接口控制子层并适于控制所述协议层(104)和所述物理层(106)的接口控制单元(108),以及 配置接口(112),其通信地耦合到所述接口控制单元(108)并且适于使得操作者能够配置用于控制所述控制实体(100)的控制命令的定时。

    Technique for rate matching in a data transmission system
    7.
    发明授权
    Technique for rate matching in a data transmission system 有权
    数据传输系统速率匹配技术

    公开(公告)号:US08446300B2

    公开(公告)日:2013-05-21

    申请号:US13056757

    申请日:2009-06-23

    申请人: Steffen Reinhardt

    发明人: Steffen Reinhardt

    IPC分类号: H03M7/00

    摘要: A technique for rate matching a bit stream (c(0-2)(k)) output from a channel encoder (102) to a data transmission rate on a physical transmission channel is described. A method embodiment of the technique comprises the steps of determining, at a beginning of a transmission time interval for a transmission of one or more code blocks on the transmission channel, bit positions of interleaver padding bits (dummy and/or filler bits) in an output buffer for buffering the output bits before transmission on the physical transmission channel; storing the determined padding bit positions (114); and determining, based on the stored padding bit positions, positions (d(0-2)(k)) of the output bits from the channel encoding stage (102) in the output buffer, wherein the stored padding bit positions are re-used for each of the one or more code blocks.

    摘要翻译: 描述从信道编码器(102)输出的比特流(c(0-2)(k))对物理传输信道上的数据传输速率进行速率匹配的技术。 该技术的方法实施例包括以下步骤:在传输信道上的一个或多个码块的传输的传输时间间隔的开头,确定在一个或多个传输信道中的交织器填充比特(伪和/​​或填充比特)的比特位置 输出缓冲器,用于在物理传输信道上传输之前缓冲输出位; 存储确定的填充比特位置(114); 以及基于所存储的填充比特位置,确定来自输出缓冲器中的信道编码级(102)的输出比特的位置(d(0-2)(k)),其中所存储的填充比特位置被重新使用 对于一个或多个代码块中的每一个。

    Communication Entity with Timing Generator Coupled Via a Digital Protocol to Sample-Driven Further Communication Entity
    8.
    发明申请
    Communication Entity with Timing Generator Coupled Via a Digital Protocol to Sample-Driven Further Communication Entity 有权
    具有定时发生器的通信实体通过数字协议耦合到采样驱动的进一步通信实体

    公开(公告)号:US20120328032A1

    公开(公告)日:2012-12-27

    申请号:US13577345

    申请日:2010-02-11

    申请人: Steffen Reinhardt

    发明人: Steffen Reinhardt

    IPC分类号: H04L27/00

    摘要: An embodiment of the invention provides a communication device (100) for processing data samples and comprises a communication entity (102) and a further communication entity (104) communicatively coupled to the communication entity (102) with a digital interface. The communication entity (102) comprises a timing generation unit (106) adapted for generating real-time related timing information for operating hardware components of the communication entity (102) when processing data samples. The further communication entity (104) is adapted for operating hardware components of the further communication entity (104) in a sample-driven way when processing data samples.

    摘要翻译: 本发明的实施例提供了一种用于处理数据样本的通信设备(100),并且包括通信实体(102)和通信地与数字接口连接到通信实体(102)的另一通信实体(104)。 通信实体(102)包括定时生成单元(106),其适于在处理数据样本时生成用于操作通信实体(102)的硬件组件的实时相关定时信息。 另外的通信实体(104)适于在处理数据样本时以采样驱动方式操作另一通信实体(104)的硬件组件。

    Technique for Synchronizing a Terminal Device with a Wireless Network
    9.
    发明申请
    Technique for Synchronizing a Terminal Device with a Wireless Network 有权
    终端设备与无线网络同步的技术

    公开(公告)号:US20110176535A1

    公开(公告)日:2011-07-21

    申请号:US13061908

    申请日:2008-09-05

    IPC分类号: H04J3/06

    CPC分类号: H04B7/2684 H04W56/0045

    摘要: The invention relates to a technique for controlling a synchronization of a terminal device (10) with a wireless network, e.g. an LTE network, wherein data are transmitted as a continuous data signal on a radio interface (11, 12) while being processed block-wise in the terminal (10). A method embodiment of the technique for achieving at least a downlink (11) synchronization comprises establishing a time-address mapping (TAM, 36) indicative of an association of a reference time value of an internal clock (32) with a reference address in the reception data buffer (16); determining an address of data samples representing the received data block in the reception data buffer (16) based on the time-address mapping; and initiating a block-wise reading of the data block from the reception data buffer (16) based on the determined address.

    摘要翻译: 本发明涉及一种用于控制终端设备(10)与无线网络的同步的技术,例如, LTE网络,其中数据在无线接口(11,12)上作为连续数据信号发送,同时在终端(10)中以块方式进行处理。 用于实现至少下行链路(11)同步的技术的方法实施例包括建立指示内部时钟(32)的参考时间值与参考地址的关联的时间地址映射(TAM,36) 接收数据缓冲器(16); 基于时间地址映射确定在接收数据缓冲器(16)中表示接收数据块的数据样本的地址; 以及基于所确定的地址,从所述接收数据缓冲器(16)发起对所述数据块的块状读取。