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公开(公告)号：US08655813B2
公开(公告)日：2014-02-18
申请号：US12982546
申请日：2010-12-30
CPC分类号： G06N3/049
摘要： Neuronal networks of electronic neurons interconnected via electronic synapses with synaptic weight normalization. The synaptic weights are based on learning rules for the neuronal network, such that a synaptic weight for a synapse determines the effect of a spiking source neuron on a target neuron connected via the synapse. Each synaptic weight is maintained within a predetermined range by performing synaptic weight normalization for neural network stability.
摘要翻译： 通过电子突触与突触体重标准化相互联系的神经元网络。 突触权重基于神经元网络的学习规则，使得突触的突触权重决定了刺激源神经元对通过突触连接的目标神经元的影响。 通过对神经网络稳定性执行突触权重归一化，将每个突触重量保持在预定范围内。
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公开(公告)号：US20120173471A1
公开(公告)日：2012-07-05
申请号：US12982546
申请日：2010-12-30
CPC分类号： G06N3/049
摘要： Neuronal networks of electronic neurons interconnected via electronic synapses with synaptic weight normalization. The synaptic weights are based on learning rules for the neuronal network, such that a synaptic weight for a synapse determines the effect of a spiking source neuron on a target neuron connected via the synapse. Each synaptic weight is maintained within a predetermined range by performing synaptic weight normalization for neural network stability.
摘要翻译： 通过电子突触与突触体重标准化相互联系的神经元网络。 突触权重基于神经元网络的学习规则，使得突触的突触权重决定了刺激源神经元对通过突触连接的目标神经元的影响。 通过对神经网络稳定性执行突触权重归一化，将每个突触重量保持在预定范围内。
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3.发明授权Adaptive and integrated visualization of spatiotemporal data from large-scale simulations 失效来自大规模模拟的时空数据的自适应和综合可视化公开(公告)号：US08699566B2
公开(公告)日：2014-04-15
申请号：US12695119
申请日：2010-01-27
IPC分类号： G06F15/00
CPC分类号： G11B27/10 , G06N3/049 , G06T11/206 , G11B27/34
摘要： Adaptive and integrated visualization of spatiotemporal data from large-scale simulation, is provided. A simulation is performed utilizing a simulator comprising multiple processors, generating spatiotemporal data samples from the simulation. Each data sample has spatial coordinates with a time stamp at a specific time resolution, and a tag. The data samples are assembled into data streams based on at least one of a spatial relationship and the corresponding tag. Each data stream is encoded into multiple formats, and an integrated and adaptive visualization of the data streams is displayed, wherein various data streams are simultaneously and synchronously displayed.
摘要翻译： 提供了大规模模拟的时空数据的自适应和综合可视化。 使用包括多个处理器的模拟器执行模拟，从仿真生成时空数据样本。 每个数据样本具有具有特定时间分辨率的时间戳的空间坐标和标签。 基于空间关系和相应标签中的至少一个将数据样本组装成数据流。 每个数据流被编码成多种格式，并且显示数据流的集成和自适应可视化，其中同时和同步地显示各种数据流。
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4.发明申请ADAPTIVE AND INTEGRATED VISUALIZATION OF SPATIOTEMPORAL DATA FROM LARGE-SCALE SIMULATIONS 失效大规模模拟的空间数据的自适应和集成可视化公开(公告)号：US20110182349A1
公开(公告)日：2011-07-28
申请号：US12695119
申请日：2010-01-27
CPC分类号： G11B27/10 , G06N3/049 , G06T11/206 , G11B27/34
摘要： Adaptive and integrated visualization of spatiotemporal data from large-scale simulation, is provided. A simulation is performed utilizing a simulator comprising multiple processors, generating spatiotemporal data samples from the simulation. Each data sample has spatial coordinates with a time stamp at a specific time resolution, and a tag. The data samples are assembled into data streams based on at least one of a spatial relationship and the corresponding tag. Each data stream is encoded into multiple formats, and an integrated and adaptive visualization of the data streams is displayed, wherein various data streams are simultaneously and synchronously displayed.
摘要翻译： 提供了大规模模拟的时空数据的自适应和综合可视化。 使用包括多个处理器的模拟器执行模拟，从仿真生成时空数据样本。 每个数据样本具有具有特定时间分辨率的时间戳的空间坐标和标签。 基于空间关系和相应标签中的至少一个将数据样本组装成数据流。 每个数据流被编码成多种格式，并且显示数据流的集成和自适应可视化，其中同时和同步地显示各种数据流。
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公开(公告)号：US09275330B2
公开(公告)日：2016-03-01
申请号：US13596278
申请日：2012-08-28
CPC分类号： G06N3/04 , G06F9/44505 , G06N3/049 , G06N3/063 , G06N3/088
摘要： Embodiments of the invention provide a neural core circuit comprising a synaptic interconnect network including plural electronic synapses for interconnecting one or more source electronic neurons with one or more target electronic neurons. The interconnect network further includes multiple axon paths and multiple dendrite paths. Each synapse is at a cross-point junction of the interconnect network between a dendrite path and an axon path. The core circuit further comprises a routing module maintaining routing information. The routing module routes output from a source electronic neuron to one or more selected axon paths. Each synapse provides a configurable level of signal conduction from an axon path of a source electronic neuron to a dendrite path of a target electronic neuron.
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公开(公告)号：US20150286924A1
公开(公告)日：2015-10-08
申请号：US13562187
申请日：2012-07-30
摘要： Embodiments of the invention relate to a scalable neural hardware for the noisy-OR model of Bayesian networks. One embodiment comprises a neural core circuit including a pseudo-random number generator for generating random numbers. The neural core circuit further comprises a plurality of incoming electronic axons, a plurality of neural modules, and a plurality of electronic synapses interconnecting the axons to the neural modules. Each synapse interconnects an axon with a neural module. Each neural module receives incoming spikes from interconnected axons. Each neural module represents a noisy-OR gate. Each neural module spikes probabilistically based on at least one random number generated by the pseudo-random number generator unit.
摘要翻译： 本发明的实施例涉及用于贝叶斯网络的噪声-OR模型的可伸缩神经硬件。 一个实施例包括神经核心电路，其包括用于产生随机数的伪随机数发生器。 神经核心电路还包括多个进入的电子轴突，多个神经模块和将轴突与神经模块相互连接的多个电子突触。 每个突触将轴突与神经模块相互连接。 每个神经模块从相互联系的轴突接收进入的尖峰。 每个神经模块表示噪声或门。 每个神经模块基于由伪随机数发生器单元生成的至少一个随机数来概率地尖峰。
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7.发明授权Multi-processor cortical simulations with reciprocal connections with shared weights 有权多处理器皮质模拟与共享权重的互惠连接公开(公告)号：US08924322B2
公开(公告)日：2014-12-30
申请号：US13524798
申请日：2012-06-15
摘要： Embodiments of the invention relate to distributed simulation frameworks that provide reciprocal communication. One embodiment comprises interconnecting neuron groups on different processors via a plurality of reciprocal communication pathways, and facilitating the exchange of reciprocal spiking communication between two different processors using at least one Ineuron module. Each processor includes at least one neuron group. Each neuron group includes at least one electronic neuron.
摘要翻译： 本发明的实施例涉及提供相互通信的分布式仿真框架。 一个实施例包括经由多个相互通信路径在不同处理器上互连神经元组，并且促进使用至少一个Ineuron模块交换两个不同处理器之间的相互加速通信。 每个处理器包括至少一个神经元组。 每个神经元组包括至少一个电子神经元。
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公开(公告)号：US20120109863A1
公开(公告)日：2012-05-03
申请号：US12828091
申请日：2010-06-30
摘要： Embodiments of the invention relate to canonical spiking neurons for spatiotemporal associative memory. An aspect of the invention provides a spatiotemporal associative memory including a plurality of electronic neurons having a layered neural net relationship with directional synaptic connectivity. The plurality of electronic neurons configured to detect the presence of a spatiotemporal pattern in a real-time data stream, and extract the spatiotemporal pattern. The plurality of electronic neurons are further configured to, based on learning rules, store the spatiotemporal pattern in the plurality of electronic neurons, and upon being presented with a version of the spatiotemporal pattern, retrieve the stored spatiotemporal pattern.
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公开(公告)号：US09189729B2
公开(公告)日：2015-11-17
申请号：US13562187
申请日：2012-07-30
摘要： Embodiments of the invention relate to a scalable neural hardware for the noisy-OR model of Bayesian networks. One embodiment comprises a neural core circuit including a pseudo-random number generator for generating random numbers. The neural core circuit further comprises a plurality of incoming electronic axons, a plurality of neural modules, and a plurality of electronic synapses interconnecting the axons to the neural modules. Each synapse interconnects an axon with a neural module. Each neural module receives incoming spikes from interconnected axons. Each neural module represents a noisy-OR gate. Each neural module spikes probabilistically based on at least one random number generated by the pseudo-random number generator unit.
摘要翻译： 本发明的实施例涉及用于贝叶斯网络的噪声-OR模型的可伸缩神经硬件。 一个实施例包括神经核心电路，其包括用于产生随机数的伪随机数发生器。 神经核心电路还包括多个输入电子轴突，多个神经模块以及将轴突与神经模块互连的多个电子突触。 每个突触将轴突与神经模块相互连接。 每个神经模块从相互联系的轴突接收进入的尖峰。 每个神经模块表示噪声或门。 每个神经模块基于由伪随机数发生器单元生成的至少一个随机数来概率地尖峰。
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公开(公告)号：US20150262059A1
公开(公告)日：2015-09-17
申请号：US13596278
申请日：2012-08-28
CPC分类号： G06N3/04 , G06F9/44505 , G06N3/049 , G06N3/063 , G06N3/088
摘要： Embodiments of the invention provide a neural core circuit comprising a synaptic interconnect network including plural electronic synapses for interconnecting one or more source electronic neurons with one or more target electronic neurons. The interconnect network further includes multiple axon paths and multiple dendrite paths. Each synapse is at a cross-point junction of the interconnect network between a dendrite path and an axon path. The core circuit further comprises a routing module maintaining routing information. The routing module routes output from a source electronic neuron to one or more selected axon paths. Each synapse provides a configurable level of signal conduction from an axon path of a source electronic neuron to a dendrite path of a target electronic neuron.
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