摘要:
A device (10) adding keyboard input to a handheld computer (12) lacking such input (such as pen computers and personal digital assistants) includes a bracket (30) having a plurality of clips (33) removably carrying the handheld computer (12), and a joint (40) secured to the keyboard (11) and the bracket (30) for positioning the keyboard (11) in a plurality of orientations relative to the handheld computer (12). These orientations include a first orientation in which the keyboard (11) is operable and at a preselected viewing angle from a display (14) that is pan of the handheld computer (12), a second orientation adjacent the display (14) in which the keyboard (11) substantially covers the display (14), and a third orientation proximate the handheld computer (12) in which the display (14) is unobstructed, thereby facilitating pen-based input through the display (14). A locking slide (51) carried in a recess (52) is selectively extended by the user to pass through a plurality of slots (53, 54 and 55) in joint (40) to secure the keyboard (11) and handheld computer (12) in the first and operational orientation.
摘要:
A protective case for housing a portable computer having a keyboard and a display, which protective case includes a keyboard case for receiving the keyboard and a display case for receiving the display. The display case is pivotally attached to the keyboard case and is movable between an open position and a closed position relative to the keyboard case. The axis of rotation of the display case relative to the keyboard case is coaxial with the axis of rotation of the display relative to the keyboard of the portable computer. An articulating handle is provided which attaches to both the keyboard case and the display case, and articulates about a pivot pin as the display case moves relative to the keyboard case. Additionally, the handle may be moved between an unlatched position whereby the display case pivots freely relative to the keyboard case, and a latched position whereby the display case is retained against movement relative to the keyboard case. In the unlatched position, the handle articulates about a pivot pin which is parallel to the axis of rotation of the portable computer. In the latched position, the pivot pin is substantially perpendicular to the axis of rotation of the portable computer thereby preventing movement of the display relative to the keyboard.
摘要:
An electronic terminal of the type employing a card reading device mounted within the interior thereof accessible through an input port formed in a wall of the terminal. A shield formed of an elastomeric material is mounted adjacent the input port of the card reader to prevent the entrance of debris into the interior of the terminal. The shield provides at least two opposing movable overlapping flaps extending over the card reader input port. The flaps are readily flexible to allow a card to slide therebetween, and automatically flex back to an overlapping closed position when the card is withdrawn. Locator pins and mating holes are provided in said flaps to assure a consistent return to the closed and sealed position. In one embodiment, the shield is made from two half sections which may be either separated or connected via a flexible bridge. In another embodiment, end inserts are provided between said half sections which may also be separate members or attached to said half sections via corresponding flexible bridges.
摘要:
A laptop style computing device (10) includes a base portion (11), a display portion (12) containing a display screen (16) and a touch input panel (18) and a mechanism (45, 55) for selectively positioning the display portion in selective angular engagement with the base portion in a plurality of angular upright positions for use in the laptop mode, as well as the display up position for slate style use and the display down position for closing the device.
摘要:
Systems and methods are provided for fast and precise estimation of frequency with relatively minimal sampling and relatively high tolerance to noise.
摘要:
Various embodiments of the invention are directed to methods and systems for multi transform OFDM transmitter and receivers with low peak to average power ratio (PAPR) signals, that have high bandwidth efficiency and are computational efficient. For example, various embodiments of the transmitter may utilize an architecture comprised of a baseband modulator, a serial to parallel converter, a bank of multiplicity NT orthonormal transforms unit, a bank of multiplicity NT inverse Fourier transforms unit, a dummy symbols generator, and a minimum PAPR evaluation unit for finding the optimum transform index n0. Various embodiments of the receiver may comprise of a transform index detection unit for the detection of the transform index imbedded in the OFDM signal.
摘要:
Various embodiments are directed to systems and methods for combining a plurality of codes. The plurality of codes may be binary codes having possible logical values of −1 and +1 and may comprise an even number of codes. An output of the combining v0,k may be given by: v0=sgn(vi), where vi is the sum of the first plurality of codes at the first time. Embodiments for allocating different power levels among various codes are presented.
摘要:
Various embodiments described herein are directed to methods and systems for blind mode adaptive equalizer system to recover complex valued data symbols from the signal transmitted over time-varying dispersive wireless channels. For example, various embodiments may utilize an architecture comprised of a channel gain normalizer, a blind mode equalizer with hierarchical structure (BMAEHS) comprised of a level 1 adaptive system and a level 2 adaptive system, and an initial data recovery subsystem. The BMAEHS may additionally be comprised of an orthogonalizer for providing a faster convergence speed. In various architectures of the invention, the BMAEHS may be replaced by a cascade of multiple equalizer stages for providing computational and other advantages. Various embodiments may employ either linear or decision feedback configurations. In the communication receiver architectures, differential encoders and decoders are presented to resolve possible ambiguities. Adaptive digital beam former architecture is presented.
摘要:
A receiver may comprise a complex mixer for converting the modulated signal to a complex modulated signal comprising a first in-phase component and a first quadrature component. The receiver may further comprise a digital demodulator. The digital demodulator may comprise at least one processor circuit programmed for applying a phase differencer for generating an output function in terms of a phase difference of the complex modulated signal. Applying the phase differencer may comprise converting the first in-phase component to a function of a phase difference of the first in-phase component expressed in digital time, and converting the first quadrature component to a function of the phase difference of the first quadrature component expressed in digital time. The at least one processor circuit of the digital demodulator may also be programmed for applying a four quadrant inverse tangent to the output function to generate the information signal.
摘要:
A FIFO memory circuit is for interfacing between circuits with different clock domains. The circuit has a FIFO memory (10), a write pointer circuit (16) clocked by the clock of a first clock domain and controlling the memory location to which data is written, and a read pointer circuit clocked by the clock of a second clock domain and controlling the memory location from which data is read. The read and write pointer circuits use gray coding. The memory circuit further comprises a duplicate write pointer circuit (30) which has its write pointer address incremented synchronously with the write pointer circuit (16), and which has a starting write address selected such that the duplicate write pointer address lags behind the write pointer address circuit by a number of address locations corresponding to the size of the FIFO memory (10). A comparator (34) compares the read pointer circuit address with the duplicate write pointer circuit address for determining a full status of the FIFO memory.