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公开(公告)号：US08687418B1
公开(公告)日：2014-04-01
申请号：US12623369
申请日：2009-11-20
IPC分类号： G11C11/34
CPC分类号： H01F41/303 , B82Y10/00 , B82Y25/00 , B82Y40/00 , G11C11/161 , H01F10/3236 , H01F10/3254 , H01F10/3272 , H01L21/28273 , H01L27/11521 , H01L27/11524 , H01L29/42332 , H01L29/7881
摘要： An embodiment of the present invention includes a non-volatile storage unit comprising a first and second N-diffusion well separated by a distance of P-substrate. A first isolation layer is formed upon the first and second N-diffusion wells and the P-substrate. A nano-pillar charge trap layer is formed upon the first isolation layer and includes conductive nano-pillars interspersed between non-conducting regions. The storage unit further includes a second isolation layer formed upon the nano-pillar charge trap layer; and at least one word line formed upon the second isolation layer and above a region of nano-pillar charge trap layer. The nano-pillar charge trap layer is operative to trap charge upon application of a threshold voltage. Subsequently, the charge trap layer may be read to determine any charge stored in the non-volatile storage unit, where presence or absence of stored charge in the charge trap layer corresponds to a bit value.
摘要翻译： 本发明的实施例包括非易失性存储单元，其包括以P基底间隔开的第一和第二N-扩散阱。 在第一和第二N-扩散阱和P-基底上形成第一隔离层。 纳米柱电荷陷阱层形成在第一隔离层上，并且包括散布在非导电区域之间的导电纳米柱。 存储单元还包括形成在纳米柱电荷陷阱层上的第二隔离层; 以及形成在第二隔离层上方和纳米柱电荷陷阱层的区域上方的至少一个字线。 纳米柱电荷陷阱层可用于在施加阈值电压时捕获电荷。 随后，可以读取电荷陷阱层以确定存储在非易失性存储单元中的任何电荷，其中电荷陷阱层中存在或不存在电荷对应于位值。
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公开(公告)号：US08574928B2
公开(公告)日：2013-11-05
申请号：US13443818
申请日：2012-04-10
申请人： Kimihiro Satoh , Yiming Huai , Yuchen Zhou , Jing Zhang , Dong Ha Jung , Ebrahim Abedifard , Rajiv Yadav Ranjan , Parviz Keshtbod
发明人： Kimihiro Satoh , Yiming Huai , Yuchen Zhou , Jing Zhang , Dong Ha Jung , Ebrahim Abedifard , Rajiv Yadav Ranjan , Parviz Keshtbod
IPC分类号： H01L21/00
CPC分类号： H01L27/222 , H01L43/12
摘要： Fabrication methods for MRAM are described wherein any re-deposited metal on the sidewalls of the memory element pillars is cleaned before the interconnection process is begun. In embodiments the pillars are first fabricated, then a dielectric material is deposited on the pillars over the re-deposited metal on the sidewalls. The dielectric material substantially covers any exposed metal and therefore reduces sources of re-deposition during subsequent etching. Etching is then performed to remove the dielectric material from the top electrode and the sidewalls of the pillars down to at least the bottom edge of the barrier. The result is that the previously re-deposited metal that could result in an electrical short on the sidewalls of the barrier is removed. Various embodiments of the invention include ways of enhancing or optimizing the process. The bitline interconnection process proceeds after the sidewalls have been etched clean as described.
摘要翻译： 描述了用于MRAM的制造方法，其中在互连过程开始之前清洁存储元件柱的侧壁上的任何重新沉积的金属。 在实施例中，首先制造柱，然后将介电材料沉积在侧壁上的再沉积金属上的柱上。 电介质材料基本上覆盖任何暴露的金属，因此在随后的蚀刻期间减少再沉积的来源。 然后进行蚀刻以将电介质材料从顶部电极和柱的侧壁向下移动到至少阻挡层的底部边缘。 结果是可能导致在屏障的侧壁上导致电短路的先前重新沉积的金属被去除。 本发明的各种实施方案包括增强或优化方法的方法。 如所描述的那样，在侧壁被蚀刻清洁之后，进行位线互连处理。
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公开(公告)号：US08477530B2
公开(公告)日：2013-07-02
申请号：US13305646
申请日：2011-11-28
IPC分类号： G11C11/14
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
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公开(公告)号：US20120068236A1
公开(公告)日：2012-03-22
申请号：US13305668
申请日：2011-11-28
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
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公开(公告)号：US20120069649A1
公开(公告)日：2012-03-22
申请号：US13305646
申请日：2011-11-28
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
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公开(公告)号：US20120069643A1
公开(公告)日：2012-03-22
申请号：US13305677
申请日：2011-11-28
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
摘要翻译： 非均匀开关型非易失性磁存储元件包括固定层，形成在固定层顶部上的阻挡层，形成在阻挡层顶部上的第一自由层，形成非均匀开关层（NSL） 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层，阻挡层，第一自由层，不均匀的开关层和第二自由层的方向上施加开关电流，导致第一自由层，第二自由层和非自由层的状态之间的切换， 均匀的开关层，开关电流大大降低。
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公开(公告)号：US08084835B2
公开(公告)日：2011-12-27
申请号：US11674124
申请日：2007-02-12
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
摘要翻译： 非均匀开关型非易失性磁存储元件包括固定层，形成在固定层顶部上的阻挡层，形成在阻挡层顶部上的第一自由层，形成非均匀开关层（NSL） 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层，阻挡层，第一自由层，不均匀的开关层和第二自由层的方向上施加开关电流，导致第一自由层，第二自由层和非自由层的状态之间的切换， 均匀的开关层，开关电流大大降低。
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公开(公告)号：US20130267042A1
公开(公告)日：2013-10-10
申请号：US13443818
申请日：2012-04-10
申请人： Kimihiro Satoh , Yiming Huai , Yuchen Zhou , Jing Zhang , Dong Ha Jung , Ebrahim Abedifard , Rajiv Yadav Ranjan , Parviz Keshtbod
发明人： Kimihiro Satoh , Yiming Huai , Yuchen Zhou , Jing Zhang , Dong Ha Jung , Ebrahim Abedifard , Rajiv Yadav Ranjan , Parviz Keshtbod
IPC分类号： H01L21/02
CPC分类号： H01L27/222 , H01L43/12
摘要： Fabrication methods for MRAM are described wherein any re-deposited metal on the sidewalls of the memory element pillars is cleaned before the interconnection process is begun. In embodiments the pillars are first fabricated, then a dielectric material is deposited on the pillars over the re-deposited metal on the sidewalls. The dielectric material substantially covers any exposed metal and therefore reduces sources of re-deposition during subsequent etching. Etching is then performed to remove the dielectric material from the top electrode and the sidewalls of the pillars down to at least the bottom edge of the barrier. The result is that the previously re-deposited metal that could result in an electrical short on the sidewalls of the barrier is removed. Various embodiments of the invention include ways of enhancing or optimizing the process. The bitline interconnection process proceeds after the sidewalls have been etched clean as described.
摘要翻译： 描述了用于MRAM的制造方法，其中在互连过程开始之前清洁存储元件柱的侧壁上的任何重新沉积的金属。 在实施例中，首先制造柱，然后将介电材料沉积在侧壁上的再沉积金属上的柱上。 电介质材料基本上覆盖任何暴露的金属，因此在随后的蚀刻期间减少再沉积的来源。 然后进行蚀刻以将电介质材料从顶部电极和柱的侧壁向下移动到至少阻挡层的底部边缘。 结果是可能导致在屏障的侧壁上导致电短路的先前重新沉积的金属被去除。 本发明的各种实施方案包括增强或优化方法的方法。 如所描述的那样，在侧壁被蚀刻清洁之后，进行位线互连处理。
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公开(公告)号：US08389301B2
公开(公告)日：2013-03-05
申请号：US13305668
申请日：2011-11-28
IPC分类号： H01L21/00
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
摘要翻译： 非均匀开关型非易失性磁存储元件包括固定层，形成在固定层顶部上的阻挡层，形成在阻挡层顶部上的第一自由层，形成非均匀开关层（NSL） 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层，阻挡层，第一自由层，不均匀的开关层和第二自由层的方向上施加开关电流，导致第一自由层，第二自由层和非自由层的状态之间的切换， 均匀的开关层，开关电流大大降低。
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公开(公告)号：US20080094886A1
公开(公告)日：2008-04-24
申请号：US11674124
申请日：2007-02-12
IPC分类号： G11C11/14 , H01L21/8239
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： One embodiment of the present invention includes a non-uniform switching based non-volatile magnetic memory element including a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer, wherein switching current is applied, in a direction that is substantially perpendicular to the fixed, barrier, first free, non-uniform and the second free layers causing switching between states of the first, second free and non-uniform layers with substantially reduced switching current.
摘要翻译： 本发明的一个实施例包括：非均匀的基于开关的非易失性磁存储元件，其包括固定层，形成在固定层顶部的阻挡层，形成在阻挡层顶部上的第一自由层， 形成在第一自由层的顶部上的均匀开关层（NSL）和形成在非均匀开关层顶部的第二自由层，其中施加开关电流，其基本上垂直于固定屏障的方向， 第一自由，不均匀和第二自由层引起第一，第二自由和非均匀层的状态之间的切换，其开关电流大大降低。
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