PEDESTRIAN TRAFFIC MANAGEMENT
    1.
    发明申请

    公开(公告)号:US20210110706A1

    公开(公告)日:2021-04-15

    申请号:US17131900

    申请日:2020-12-23

    摘要: Various systems and methods for pedestrian traffic management are described herein, comprising segmenting a pedestrian route into at least one pedestrian walking segment using location information of transportation resources, and determining estimated transit times for the at least one pedestrian walking segment and an estimated wait time for the first transportation resource using received status information of the first transportation resource and the determined estimated transit time for the first pedestrian walking segment.

    PIXEL DATA PROCESSING APPARATUS AND METHOD OF PROCESSING PIXEL DATA
    2.
    发明申请
    PIXEL DATA PROCESSING APPARATUS AND METHOD OF PROCESSING PIXEL DATA 有权
    像素数据处理设备和处理像素数据的方法

    公开(公告)号:US20120268472A1

    公开(公告)日:2012-10-25

    申请号:US13500362

    申请日:2009-11-02

    IPC分类号: G06T1/00

    CPC分类号: G06F9/325

    摘要: A pixel data processing apparatus comprises a data path unit comprising a hardware module dedicated to performing, when in use, predetermined functionality in relation to image data. The apparatus also comprises a data store for storing image data and a programmable engine. The programmable engine is arranged to route, when in use, data associated with the image data though the data path unit in a predetermined manner.

    摘要翻译: 像素数据处理装置包括数据路径单元,该数据路径单元包括专用于在使用时执行与图像数据相关的预定功能的硬件模块。 该装置还包括用于存储图像数据的数据存储器和可编程引擎。 可编程引擎被布置成在使用时以预定方式通过数据路径单元路由与图像数据相关联的数据。

    System and method for efficient image feature extraction
    3.
    发明授权
    System and method for efficient image feature extraction 失效
    高效图像特征提取的系统和方法

    公开(公告)号:US08744190B2

    公开(公告)日:2014-06-03

    申请号:US13140025

    申请日:2009-01-05

    IPC分类号: G06K9/46 G06K9/66

    CPC分类号: G06K9/0061 G06K9/00973

    摘要: A system for efficient image feature extraction comprises a buffer for storing a slice of at least n lines of gradient direction pixel values of a directional gradient image. The buffer has an input for receiving the first plurality n of lines and an output for providing a second plurality m of columns of gradient direction pixel values of the slice to an input of a score network, which comprises comparators for comparing the gradient direction pixel values of the second plurality of columns with corresponding reference values of a reference directional gradient pattern of a shape and adders for providing partial scores depending on output values of the comparators to score network outputs which are coupled to corresponding inputs of an accumulation network having an output for providing a final score depending on the partial scores.

    摘要翻译: 用于高效图像特征提取的系统包括用于存储方向性梯度图像的至少n行梯度方向像素值的切片的缓冲器。 缓冲器具有用于接收第一多个n行的输入和用于将片的梯度方向像素值的第二多个列提供给分数网络的输入的输出,其包括比较器,用于比较梯度方向像素值 具有形状和加法器的参考方向性梯度图案的相应参考值的第二多列,用于根据比较器的输出值提供部分分数,以对网络输出进行分值,所述网络输出耦合到累积网络的相应输入,所述累积网络具有用于 根据部分分数提供最终得分。

    SYSTEM AND METHOD FOR EFFICIENT IMAGE FEATURE EXTRACTION
    4.
    发明申请
    SYSTEM AND METHOD FOR EFFICIENT IMAGE FEATURE EXTRACTION 失效
    用于高效图像特征提取的系统和方法

    公开(公告)号:US20110249869A1

    公开(公告)日:2011-10-13

    申请号:US13140025

    申请日:2009-01-05

    IPC分类号: G06K9/46 G06K9/00

    CPC分类号: G06K9/0061 G06K9/00973

    摘要: A system for efficient image feature extraction comprises a buffer for storing a slice of at least n lines of gradient direction pixel values of a directional gradient image. The buffer has an input for receiving the first plurality n of lines and an output for providing a second plurality m of columns of gradient direction pixel values of the slice to an input of a score network, which comprises comparators for comparing the gradient direction pixel values of the second plurality of columns with corresponding reference values of a reference directional gradient pattern of a shape and adders for providing partial scores depending on output values of the comparators to score network outputs which are coupled to corresponding inputs of an accumulation network having an output for providing a final score depending on the partial scores.

    摘要翻译: 用于高效图像特征提取的系统包括用于存储方向性梯度图像的至少n行梯度方向像素值的切片的缓冲器。 缓冲器具有用于接收第一多个n行的输入和用于将片的梯度方向像素值的第二多个列提供给分数网络的输入的输出,其包括比较器,用于比较梯度方向像素值 具有形状和加法器的参考方向性梯度图案的相应参考值的第二多列,用于根据比较器的输出值提供部分分数,以对网络输出进行分值,所述网络输出耦合到累积网络的相应输入,所述累积网络具有用于 根据部分分数提供最终得分。

    Method of matching image features with reference features and integrated circuit therefor
    5.
    发明授权
    Method of matching image features with reference features and integrated circuit therefor 有权
    匹配图像特征与参考特征的方法及其集成电路

    公开(公告)号:US09378431B2

    公开(公告)日:2016-06-28

    申请号:US14359029

    申请日:2011-11-18

    摘要: The invention is related to a method of matching image features with reference features, comprising the steps of providing a current image captured by a capturing device, providing reference features (r), wherein each of the reference features comprises at least one reference feature descriptor (d(r)), determining current features (c) in the current image and associating with each of the current features at least one respective current feature descriptor (d(c)), and matching the current features with at least some of the reference features by determining a respective similarity measure (D(c, r)) between each respective current feature descriptor (d(c)) and each respective reference feature descriptor (d(r)). According to the invention, the determination of the similarity measure is performed on an integrated circuit by hardwired logic or configurable logic which processes logical functions for determining the similarity measure. The invention is also concerned with an integrated circuit for matching of image features with reference features.

    摘要翻译: 本发明涉及一种将图像特征与参考特征相匹配的方法,包括以下步骤:提供由捕获设备捕获的当前图像,提供参考特征(r),其中每个参考特征包括至少一个参考特征描述符 确定当前图像中的当前特征(c)并且与至少一个相应的当前特征描述符(d(c))中的每个当前特征相关联,并且使当前特征与参考中的至少一些相匹配 特征通过确定每个相应的当前特征描述符(d(c))和每个相应的参考特征描述符(d(r))之间的相应相似性度量(D(c,r))。 根据本发明,通过硬线逻辑或可配置逻辑在集成电路上执行相似性度量的确定,该逻辑处理用于确定相似性度量的逻辑功能。 本发明还涉及用于将图像特征与参考特征匹配的集成电路。

    Pixel data processing apparatus and method of processing pixel data
    6.
    发明授权
    Pixel data processing apparatus and method of processing pixel data 有权
    像素数据处理装置和处理像素数据的方法

    公开(公告)号:US08970610B2

    公开(公告)日:2015-03-03

    申请号:US13500362

    申请日:2009-11-02

    IPC分类号: G06T1/00 H03K19/173 G06F9/32

    CPC分类号: G06F9/325

    摘要: A pixel data processing apparatus comprises a data path unit comprising a hardware module dedicated to performing, when in use, predetermined functionality in relation to image data. The apparatus also comprises a data store for storing image data and a programmable engine. The programmable engine is arranged to route, when in use, data associated with the image data through the data path unit in a predetermined manner.

    摘要翻译: 像素数据处理装置包括数据路径单元,该数据路径单元包括专用于在使用时执行与图像数据相关的预定功能的硬件模块。 该装置还包括用于存储图像数据的数据存储器和可编程引擎。 可编程引擎被布置成在使用中以预定方式通过数据路径单元路由与图像数据相关联的数据。

    MICROPROCESSOR ARCHITECTURE AND METHOD OF INSTRUCTION DECODING
    7.
    发明申请
    MICROPROCESSOR ARCHITECTURE AND METHOD OF INSTRUCTION DECODING 审中-公开
    微处理器架构和指令解码方法

    公开(公告)号:US20110271083A1

    公开(公告)日:2011-11-03

    申请号:US13142431

    申请日:2009-01-21

    IPC分类号: G06F9/30

    摘要: A microprocessor architecture comprises an instruction decoding network for decoding in a first mode partially suppressed opcodes of a sequence of instructions, the opcodes comprising a first part containing parameters being invariant for each opcode of the sequence and a second part comprising a flag indicating an end of the sequence, the first part being suppressed for all opcodes of the sequence except a first opcode of the sequence. Further, a method of instruction decoding in a microprocessor architecture comprising an instruction decoding network for decoding in a first mode partially suppressed opcodes of a sequence of instructions, and in a second mode uncompressed instructions comprises decoding an opcode of an instruction in the second mode when the instruction is not compressible; and decoding an opcode of an instruction in the first mode when the instruction is compressible.

    摘要翻译: 微处理器架构包括指令解码网络,用于以第一模式解码部分抑制的指令序列的操作码,所述操作码包括第一部分,该第一部分包含对该序列的每个操作码不变的参数;以及第二部分,包括指示结束 该序列,除了该序列的第一操作码之外,该序列的所有操作码的第一部分被抑制。 此外,一种在微处理器架构中的指令解码方法,包括用于以第一模式进行解码的指令解码网络,部分地抑制指令序列的操作码,并且在第二模式中,未压缩指令包括在第二模式中对指令的操作码进行解码, 该指令是不可压缩的; 以及当所述指令是可压缩的时,解码所述第一模式中的指令的操作码。