公开(公告)号：US20200258557A1

公开(公告)日：2020-08-13

申请号：US16793638

申请日：2020-02-18

Applicant: Rambus Inc.

Inventor： Thomas GIOVANNINI ,  Scott C. BEST ,  Lei LUO ,  Ian SHAEFFER

IPC: G11C7/22 ,  G11C29/02 ,  G11C29/50 ,  G11C29/56

Abstract: A first timing reference signal and a second timing reference signal are sent to a memory device. The second timing reference signal has approximately a quadrature phase relationship with respect to the first timing reference signal. A plurality of serial data patterns are received from the memory device. The transitions of the first timing reference and the second timing reference determining when transitions occur between the bits of the plurality of data patterns. Timing indicators associated with when received transitions occur between the bits of the plurality of data patterns are received from the memory device. The timing indicators are each measured using a single sampler. Based on the timing indicators, a first duty cycle adjustment for the first timing reference signal, a second duty cycle adjustment for the second timing reference signal, and a quadrature phase adjustment are determined and applied.

公开(公告)号：US20160132439A1

公开(公告)日：2016-05-12

申请号：US14874324

申请日：2015-10-02

Applicant: Rambus Inc.

Inventor： Ian SHAEFFER ,  Arun VAIDYANATH ,  Sanku MUKHERJEE

IPC: G06F13/16 ,  G06F13/40

CPC classification number: G06F13/1678 ,  G06F1/3275 ,  G06F12/0246 ,  G06F13/1668 ,  G06F13/1684 ,  G06F13/4022 ,  G06F13/4068 ,  G06F13/4072 ,  Y02D10/14 ,  Y02D10/151

Abstract: An expandable memory system that enables a fixed signaling bandwidth to be configurably re-allocated among dedicated memory channels. Memory channels having progressively reduced widths are dedicated to respective memory sockets, thus enabling point-to-point signaling with respect to each memory socket without signal-compromising traversal of unloaded sockets or costly replication of a full-width memory channel for each socket.

Abstract translation: 一种可扩展存储器系统，其使得能够在专用存储器通道之间可配置地重新分配固定的信令带宽。 具有逐渐减小的宽度的存储器通道专用于相应的存储器插槽，从而使得能够相对于每个存储器插座的点对点信令，而不会对每个插座的全宽度存储器通道的无负载插座进行信号损害遍历或昂贵的复制。