公开(公告)号：US07206924B2

公开(公告)日：2007-04-17

申请号：US10751210

申请日：2003-12-31

Applicant: Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

Inventor： Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

IPC: G06F12/08

CPC classification number: G06F9/30192 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30101 ,  G06F9/3012 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/321 ,  G06F9/325

Abstract: A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus increasing performances and decreasing program memory usage.

Abstract translation: 微控制器装置设置有用于操纵微控制器的行为的指令集。 提供了使得能够实现模块化仿真的线性化地址空间的装置和系统。 可以通过寄存器文件或数据存储器进行直接或间接寻址。 特殊功能寄存器，包括程序计数器（PC）和工作寄存器（W），映射到数据存储器中。 正交（对称）指令集可以使用任何寻址模式对任何寄存器进行任何操作。 因此，在两个操作数指令中要使用两个文件寄存器。 这允许在两个寄存器之间直接移动数据，而不经过W寄存器。 从而增加性能并减少程序内存的使用。

公开(公告)号：US5870409A

公开(公告)日：1999-02-09

申请号：US671011

申请日：1996-06-28

Applicant: Randy Yach ,  Rodney Drake

Inventor： Randy Yach ,  Rodney Drake

IPC: G01R31/00 ,  G02F1/13 ,  G02F1/133 ,  G06F11/267 ,  G09G3/00 ,  G09G3/36 ,  H04N5/66 ,  G01R31/28

CPC classification number: G09G3/006 ,  G06F11/2221

Abstract: A method is disclosed for testing a high speed microcontroller fabricated on a semiconductor chip, and for testing relatively low speed functions of a liquid crystal display (LCD) module on the chip that drives an off-chip LCD for an external system to be controlled by the microcontroller with a plurality of discrete analog voltage levels for performing the LCD functions. Digital values are multiplexed in time slots of a test waveform to simulate in high speed digital format of a test mode the low speed timing, relative magnitude and functionality of analog voltage levels used to drive the LCD; A high speed driver is selectively coupled to a pin of the chip, to which the discrete analog voltage levels are normally applied at low speed to drive the LCD, and the test waveform is applied to the high speed driver. The digital values and timing that appear on the pin are then monitored as an indication of proper functionality of the LCD module. The high speed driver is switched out and the normal low speed LCD driver is switched back for return to an LCD user mode when the test mode is completed. Monitoring the pin with a digital tester allows verification that pin pulses in predetermined time slots indicate the corresponding analog voltage level is being applied at the proper time during normal operation of the LCD module, and digitally testing of continuity in an analog channel. A transistor normally employed on the chip for electrostatic discharge protection is activated to selectively couple the high speed driver to the pin for the high speed testing mode.

Abstract translation: 公开了一种用于测试在半导体芯片上制造的高速微控制器的方法，并且用于测试芯片上的液晶显示器（LCD）模块的相对低速功能，该芯片驱动用于外部系统的片外LCD以由 具有用于执行LCD功能的多个离散模拟电压电平的微控制器。 数字值在测试波形的时隙中进行多路复用，以模拟用于驱动LCD的模拟电压电平的低速定时，相对幅度和功能的测试模式的高速数字格式; 选择性地将高速驱动器耦合到芯片的引脚，通过低速驱动分立的模拟电压电平来驱动LCD，测试波形被施加到高速驱动器。 然后监视引脚上出现的数字值和时序作为LCD模块正常功能的指示。 当测试模式完成时，高速驱动器被切换并且正常的低速LCD驱动器被切回以返回到LCD用户模式。 使用数字测试仪监控引脚，可以验证在预定时隙内的引脚脉冲表示在LCD模块正常工作期间的适当时间正在施加相应的模拟电压电平，并对模拟通道的连续性进行数字测试。 通常在芯片上用于静电放电保护的晶体管被​​激活以选择性地将高速驱动器耦合到用于高速测试模式的引脚。

公开(公告)号：US06708268B1

公开(公告)日：2004-03-16

申请号：US09280112

申请日：1999-03-26

Applicant: Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

Inventor： Edward Brian Boles ,  Rodney Drake ,  Darrel Johansen ,  Sumit Mitra ,  Joseph Triece ,  Randy Yach

IPC: G06F1208

CPC classification number: G06F9/30192 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30101 ,  G06F9/3012 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/321 ,  G06F9/325

Abstract: A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used in some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus increasing performance and decreasing program memory usage.

Abstract translation: 微控制器装置设置有用于操纵微控制器的行为的指令集。 提供了使得能够实现模块化仿真的线性化地址空间的装置和系统。 可以通过寄存器文件或数据存储器进行直接或间接寻址。 特殊功能寄存器，包括程序计数器（PC）和工作寄存器（W），映射到数据存储器中。 正交（对称）指令集可以使用任何寻址模式对任何寄存器进行任何操作。 因此，在两个操作数指令中要使用两个文件寄存器。 这允许在两个寄存器之间直接移动数据，而不经过W寄存器。 从而提高性能并减少程序内存的使用。

公开(公告)号：US08427075B2

公开(公告)日：2013-04-23

申请号：US12622745

申请日：2009-11-20

Applicant: Ward R. Brown ,  Randy Yach

Inventor： Ward R. Brown ,  Randy Yach

IPC: H05B37/02

CPC classification number: H05B33/0806 ,  H05B33/0815

Abstract: A constant current output sink or source eliminates a current limiting series resistor for a light emitting diode (LED) and maintains a constant light intensity from the LED for all operating and manufacturing variables of a digital device since the current through the LED is maintained at a constant value. The constant current output sink or source may be programmable for selection of a constant current value from a plurality of constant current values available.

Abstract translation: 恒定电流输出接收器或源极消除了用于发光二极管（LED）的限流串联电阻器，并且为了数字器件的所有操作和制造变量而保持来自LED的恒定的光强度，因为通过LED的电流维持在 恒定值。 恒流输出接收器或源可以是可编程的，用于从可用的多个恒定电流值中选择恒定电流值。

公开(公告)号：US07876540B2

公开(公告)日：2011-01-25

申请号：US12174802

申请日：2008-07-17

Applicant: Philippe Deval ,  Patrick Besseux ,  Randy Yach

Inventor： Philippe Deval ,  Patrick Besseux ,  Randy Yach

IPC: H02H9/00

CPC classification number: H01L27/0266 ,  H02H9/046

Abstract: Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capacitive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.

公开(公告)号：US20070140008A1

公开(公告)日：2007-06-21

申请号：US11314504

申请日：2005-12-21

Applicant: Jeffrey Shields ,  Kent Hewitt ,  Donald Gerber ,  Randy Yach

Inventor： Jeffrey Shields ,  Kent Hewitt ,  Donald Gerber ,  Randy Yach

IPC: G11C16/04 ,  G11C11/34

CPC classification number: H01L27/115 ,  G11C16/0425 ,  H01L27/11521 ,  H01L27/11524

Abstract: An array of N-channel memory cells may be separated into independently programmable memory segments by creating multiple, electrically isolated P-wells upon which the memory segments are fabricated. The multiple, electrically isolated P-wells may be created, for example, by p-n junction isolation or dielectric isolation.

Abstract translation: N沟道存储器单元的阵列可以通过在其上制造存储器段的多个电隔离的P阱分离成独立可编程的存储器段。 多个电隔离的P阱可以例如通过p-n结隔离或电介质隔离来产生。

公开(公告)号：US20070007597A1

公开(公告)日：2007-01-11

申请号：US11215775

申请日：2005-08-30

Applicant: Randy Yach ,  Philippe Deval

Inventor： Randy Yach ,  Philippe Deval

IPC: H01L23/62

CPC classification number: H01L27/0266

Abstract: An electrostatic discharge (ESD) structure having increased voltage withstand at an output terminal of an integrated circuit device has a thin gate oxide layer metal oxide semiconductor (MOS) device coupled in series with a thicker gate oxide layer MOS device. The thin gate oxide layer MOS device may be controlled by a low voltage control circuit of the integrated circuit. The thicker gate oxide layer MOS device may be coupled to an output of the integrated circuit device or a bipolar transistor may be coupled between the output of the integrated circuit device and the thicker gate oxide layer MOS device. The thin gate oxide layer and thicker gate oxide layer MOS devices may be coupled in series.

Abstract translation: 在集成电路器件的输出端具有增加的耐压的静电放电（ESD）结构具有与较厚栅极氧化物层MOS器件串联耦合的薄栅极氧化物层金属氧化物半导体（MOS）器件。 薄栅氧化层MOS器件可以由集成电路的低压控制电路来控制。 较厚的栅极氧化物层MOS器件可以耦合到集成电路器件的输出，或者双极晶体管可以耦合在集成电路器件的输出和较厚栅极氧化物层MOS器件之间。 薄栅极氧化物层和较厚栅极氧化物层MOS器件可以串联耦合。

公开(公告)号：US20140134574A1

公开(公告)日：2014-05-15

申请号：US14160840

申请日：2014-01-22

Applicant: Randy Yach

Inventor： Randy Yach ,  Paul Katz

IPC: F41G3/26

CPC classification number: F41G3/2655 ,  F41A33/02 ,  F41J5/00

Abstract: Laser target practice using an ultra-violet light emitting laser that is pulsed on when a weapon trigger is pulled. The UV laser light pulse illuminates a spot on a target having a coating of phosphorescent material on a face thereof. The phosphorescent material within the illuminated spot glows for a certain time thereby visually indicating a location of the spot on the target. The UV laser light pulse may also illuminate a spot on a target having a photochromic paint coatings on a face thereof. The photochromic paint coatings within the illuminated spot changes color thereby indicating a location of the spot on the target.

Abstract translation: 使用在武器扳机被拉动时脉冲的紫外光发射激光的激光瞄准练习。 紫外激光脉冲在其表面上照射具有磷光材料涂层的靶上的斑点。 照明光斑内的磷光材料发光一定时间，从而可视地显示光斑在靶上的位置。 UV激光脉冲也可以照射其表面上具有光致变色涂料的靶上的斑点。 照明区域内的光致变色涂料涂层改变颜色，从而指示目标点上的位置。

公开(公告)号：US07885047B2

公开(公告)日：2011-02-08

申请号：US12174903

申请日：2008-07-17

Applicant: Philippe Deval ,  Patrick Besseux ,  Randy Yach

Inventor： Philippe Deval ,  Patrick Besseux ,  Randy Yach

IPC: H02H9/00

CPC classification number: H01L27/0266 ,  H02H9/046

Abstract: Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capacitive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.

Abstract translation: 器件接口的自适应静电放电（ESD）保护在处理或安装到系统或从系统中移除时具有非常好的ESD鲁棒性。 并且当其在系统中可操作时，具有对DPI，电磁干扰（EMI）等的强大的抗扰性。 在外部连接上没有（或低电平）DPI时，ESD保护金属氧化物半导体（MOS）器件的漏极和栅极之间存在显着的电容耦合，以增强ESD保护和较低的反冲电压。 。 因此当在外部连接上检测到显着的DPI / EMI信号时，MOS ESD保护器件的漏极和栅极之间的电容耦合被断开，旁路或衰减，从而增强了器件的DPI / EMI抗扰度。

公开(公告)号：US20090128970A1

公开(公告)日：2009-05-21

申请号：US12174903

申请日：2008-07-17

Applicant: Philippe Deval ,  Patrick Besseux ,  Randy Yach

Inventor： Philippe Deval ,  Patrick Besseux ,  Randy Yach

IPC: H02H9/00

CPC classification number: H01L27/0266 ,  H02H9/046

Abstract: Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capa citive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.