公开(公告)号：US20180012645A1

公开(公告)日：2018-01-11

申请号：US15710639

申请日：2017-09-20

Applicant: Renesas Electronics Corporation

Inventor： Toru HAYASHI ,  Motoo SUWA

IPC: G11C11/4076 ,  G06F1/12 ,  G11C7/10 ,  G11C11/4096 ,  G11C5/06

CPC classification number: G11C11/4076 ,  G06F1/12 ,  G11C5/063 ,  G11C7/10 ,  G11C11/4096 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: An electronic device includes a substrate including an upper surface, a clock output pad formed in a control device mounting area of the upper surface, a command/address output pad formed in the control device mounting area, a clock signal main wiring connected to the clock output pad, a command/address signal main wiring connected to the command/address output pad, a first clock signal branch wiring branched from the clock signal main wiring at a first branch point of the clock signal main wiring, and a second clock signal branch wiring branched from the clock signal main wiring at a second branch point of the clock signal main wiring, which is located at a downstream side of the clock signal main wiring than the first branch point of the clock signal main wiring.

公开(公告)号：US20170243630A1

公开(公告)日：2017-08-24

申请号：US15589166

申请日：2017-05-08

Applicant: Renesas Electronics Corporation

Inventor： Toru HAYASHI ,  Motoo SUWA

IPC: G11C11/4076 ,  G11C11/4096 ,  G06F1/12

CPC classification number: G11C11/4076 ,  G06F1/12 ,  G11C5/063 ,  G11C7/10 ,  G11C11/4096 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: An electronic device includes a substrate including an upper surface, a clock output pad formed in a control device mounting area of the upper surface, a command/address output pad formed in the control device mounting area, a clock signal main wiring connected to the clock output pad, a command/address signal main wiring connected to the command/address output pad, a first clock signal branch wiring branched from the clock signal main wiring at a first branch point of the clock signal main wiring, and a second clock signal branch wiring branched from the clock signal main wiring at a second branch point of the clock signal main wiring, which is located at a downstream side of the clock signal main wiring than the first branch point of the clock signal main wiring.