公开(公告)号：US20160181147A1

公开(公告)日：2016-06-23

申请号：US15054696

申请日：2016-02-26

Applicant: Renesas Electronics Corporation

Inventor： Jiro YUGAMI ,  Toshiaki IWAMATSU ,  Katsuyuki HORITA ,  Hideki MAKIYAMA ,  Yasuo INOUE ,  Yoshiki YAMAMOTO

IPC: H01L21/762 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311

CPC classification number: H01L21/76283 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/30604 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649

Abstract: A first MISFET which is a semiconductor element is formed on an SOI substrate. The SOI substrate includes a supporting substrate which is a base, BOX layer which is an insulating layer formed on a main surface (surface) of the supporting substrate, that is, a buried oxide film; and an SOI layer which is a semiconductor layer formed on the BOX layer. The first MISFET as a semiconductor element is formed to the SOI layer. In an isolation region, an isolation groove is formed penetrating though the SOI layer and the BOX layer so that a bottom surface of the groove is positioned in the middle of a thickness of the supporting substrate. An isolation film is buried in the isolation groove being formed. Then, an oxidation resistant film is interposed between the BOX layer and the isolation film.

公开(公告)号：US20130140669A1

公开(公告)日：2013-06-06

申请号：US13691800

申请日：2012-12-02

Applicant: Renesas Electronics Corporation

Inventor： Jiro YUGAMI ,  Toshiaki IWAMATSU ,  Katsuyuki HORITA ,  Hideki MAKIYAMA ,  Yasuo INOUE ,  Yoshiki YAMAMOTO

IPC: H01L29/06 ,  H01L21/762

CPC classification number: H01L21/76283 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/30604 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/823807 ,  H01L21/823878 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649

Abstract: A first MISFET which is a semiconductor element is formed on an SOI substrate. The SOI substrate includes a supporting substrate which is a base, BOX layer which is an insulating layer formed on a main surface (surface) of the supporting substrate, that is, a buried oxide film; and an SOI layer which is a semiconductor layer formed on the BOX layer. The first MISFET as a semiconductor element is formed to the SOI layer. In an isolation region, an isolation groove is formed penetrating though the SOI layer and the BOX layer so that a bottom surface of the groove is positioned in the middle of a thickness of the supporting substrate. An isolation film is buried in the isolation groove being formed. Then, an oxidation resistant film is interposed between the BOX layer and the isolation film.

Abstract translation: 在SOI衬底上形成作为半导体元件的第一MISFET。 SOI衬底包括作为基底的支撑衬底，BOX层，其是形成在支撑衬底的主表面（表面）上的绝缘层，即掩埋氧化物膜; 以及作为在BOX层上形成的半导体层的SOI层。 作为半导体元件的第一MISFET形成于SOI层。 在隔离区域中，穿过SOI层和BOX层形成隔离槽，使得槽的底面位于支撑基板的厚度的中间。 隔离膜被埋在正在形成的隔离槽中。 然后，在BOX层和隔离膜之间插入抗氧化膜。