Methodology for improved semiconductor process monitoring using optical
emission spectroscopy
    1.
    发明授权
    Methodology for improved semiconductor process monitoring using optical emission spectroscopy 失效
    使用光发射光谱法改进半导体工艺监测的方法

    公开(公告)号:US6046796A

    公开(公告)日:2000-04-04

    申请号:US64470

    申请日:1998-04-22

    摘要: In a semiconductor process which utilizes a plasma within a process tool chamber, a method of using optical emission spectroscopy (OES) to monitor a particular parameter of the process is disclosed. A first wavelength present in the plasma is determined which varies highly in intensity depending on the particular parameter by observing a statistically significant sample representing variations of the particular parameter. A second wavelength of chemical significance to the process is also determined which is relatively stable in intensity over time irrespective of variations of the particular parameter, also by observing a statistically significant sample representing variations of the particular parameter. These two wavelengths may be determined from test wafers and off-line physical measurements. Then, the intensity of the first and second wavelengths present in the plasma is measured on-line during normal processing within the process tool chamber, and the ratio between the first and second wavelength's respective intensities generates a numeric value which is correlated to the particular parameter. As an example, such a method may be used to generate a reliable alarm signal indicating the presence of etch stop conditions within a plasma oxide etcher, as well as to indicate the oxide etch rate.

    摘要翻译: 在利用处理工具室内的等离子体的半导体工艺中,公开了一种使用光发射光谱(OES)监测该工艺的特定参数的方法。 确定存在于等离子体中的第一波长,其通过观察表示特定参数的变化的统计学显着样本,根据特定参数而强度变化很大。 还确定了对于该方法具有化学意义的第二波长,其与强度随时间相对稳定,而与特定参数的变化无关,还可以通过观察表示特定参数的变化的统计学上显着的样本。 这两个波长可以从测试晶片和离线物理测量中确定。 然后,存在于等离子体中的第一波长和第二波长的强度在处理工具室内的正常处理期间在线测量,并且第一和第二波长的相应强度之间的比率产生与特定参数相关的数值 。 作为示例,可以使用这种方法来产生指示在等离子体氧化物蚀刻器内存在蚀刻停止条件的可靠报警信号,以及指示氧化物蚀刻速率。

    Method of forming low resistance contact structures in vias arranged
between two levels of interconnect lines
    2.
    发明授权
    Method of forming low resistance contact structures in vias arranged between two levels of interconnect lines 失效
    在布置在两层互连线之间的通孔中形成低电阻接触结构的方法

    公开(公告)号:US6013574A

    公开(公告)日:2000-01-11

    申请号:US906062

    申请日:1997-08-05

    摘要: A method of forming low resistance contact structures in vias arranged between interconnect levels is provided. The method involves interconnect lines having an anti-reflective layer formed thereupon. An interlevel dielectric layer is formed over the interconnect lines. A photoresist layer is formed over the interlevel dielectric layer and patterned to define via locations. During via etch, an organic (carbon-based) polymer layer forms upon the anti-reflective-coated interconnect lines at the bottoms of the vias. The photoresist and the etch byproduct polymer layers are then removed using a dry etch process which employs a forming gas comprising nitrogen and hydrogen. A native oxide layer subsequently forms upon the anti-reflective-coated interconnect lines when exposed to oxygen. The native oxide layer is then removed, along with any residual etch byproduct polymer, during a sputter etch procedure. Each resulting via is substantially void of polymer and oxide residue so as to present a clean via area which allows ready adherence of a plug material to the anti-reflective coating.

    摘要翻译: 提供了一种在布置在互连层之间的通孔中形成低电阻接触结构的方法。 该方法涉及在其上形成有抗反射层的互连线。 在互连线上形成层间电介质层。 在层间电介质层之上形成光致抗蚀剂层并图案化以限定通孔位置。 在通孔蚀刻期间,在通孔底部的抗反射涂覆的互连线上形成有机(碳基)聚合物层。 然后使用采用包含氮和氢的成形气体的干式蚀刻工艺除去光致抗蚀剂和蚀刻副产物聚合物层。 当暴露于氧气时,随后在抗反射涂布的互连线上形成天然氧化物层。 然后在溅射蚀刻过程期间将天然氧化物层与任何残留的蚀刻副产物聚合物一起除去。 每个所得到的通孔基本上不含聚合物和氧化物残余物,以便呈现干净的通孔区域,其允许插塞材料容易地粘附到抗反射涂层上。