公开(公告)号：US09037890B2

公开(公告)日：2015-05-19

申请号：US13559320

申请日：2012-07-26

申请人： Richard V De Caro ,  Danut Manea ,  Yongliang Wang ,  Stephen Trinh ,  Paul Hill

发明人： Richard V De Caro ,  Danut Manea ,  Yongliang Wang ,  Stephen Trinh ,  Paul Hill

IPC分类号： G06F1/26 ,  G06F1/32 ,  G11C5/14 ,  G11C16/30

CPC分类号： G06F1/3296 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3275 ,  G06F1/3287 ,  G11C5/147 ,  G11C5/148 ,  G11C16/30 ,  G11C2216/30 ,  Y02D10/14 ,  Y02D50/20

摘要： A memory device includes a voltage regulator, whose output provides a voltage supply for various other components of the memory device, including a command user interface. The memory device is placed into an ultra-deep power-down mode by providing to the memory device a software command, which causes the output of the voltage regulator to be disabled. To bring the memory device out of the ultra-deep power-down mode, a chip select signal is provided to the memory device, which includes a wake-up circuit that remains powered on even when the memory device is in the ultra-deep power-down mode. Receipt of the chip select signal while the memory device is in the ultra-deep power-down mode causes the output of the voltage regulator to be enabled, thereby providing power to the components that were completely powered down.

摘要翻译： 存储器件包括电压调节器，其输出为存储器件的各种其他部件提供电压供应，包括命令用户界面。 存储器件通过向存储器件提供软件命令而被置于超深度掉电模式，该命令导致电压调节器的输出被禁止。 为了使存储器件脱离超深度掉电模式，芯片选择信号被提供给存储器件，其包括即使当存储器件处于超深度功率时仍保持通电的唤醒电路 降模式。 当存储器件处于超深度掉电模式时，芯片选择信号的接收使得电压调节器的输出被使能，从而为完全断电的部件提供电力。