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公开(公告)号：US20110095803A1
公开(公告)日：2011-04-28
申请号：US11629768
申请日：2005-06-09
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3243 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/172
摘要： The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a variable resistor means is locally controlled so as to individually adjust power supply for each of said at least two electrically isolated circuit regions (10) based on the at least one monitored working parameter. Thereby, a fast and simple control functionality with low area overhead can be provided.
摘要翻译： 本发明涉及一种用于控制集成电路中的电源的电路装置和方法，其中监控至少一个电隔离电路区域（10）的至少一个工作参数，并且可变电阻器装置的电导率被局部控制 用于基于所述至少一个被监视的工作参数单独地调节所述至少两个电隔离电路区域（10）中的每一个的电源。 因此，可以提供具有低面积开销的快速且简单的控制功能。
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公开(公告)号：US07500204B2
公开(公告)日：2009-03-03
申请号：US10559208
申请日：2004-05-28
申请人： Jose De Jesus Pineda De Gyvez , Francesco Pessolano , Rinze Ida Mechitildis Peter Meijer , Josep Rius Vazquez , Kiran Batni Raghavendra Rao
发明人： Jose De Jesus Pineda De Gyvez , Francesco Pessolano , Rinze Ida Mechitildis Peter Meijer , Josep Rius Vazquez , Kiran Batni Raghavendra Rao
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to real-time adaptive control for best Integrated Circuit (IC) performance. The adaptive behavior is carried out on a local basis. The system is partitioned into different islands (30). Each island (30) is controlled and its working conditions are modified depending on some parameters. The remainder of the chip is controlled as well, depending on other parameters. This requires that each island (30) has a local controller (36) communicating with a global controller (42). The main control parameters are e.g. supply voltage, threshold voltage and clock frequency.
摘要翻译： 本发明涉及用于最佳集成电路（IC）性能的实时自适应控制。 适应行为是在当地进行的。 系统被划分成不同的岛屿（30）。 每个岛（30）被控制，并且其工作条件根据一些参数而被修改。 芯片的其余部分也受到控制，取决于其他参数。 这要求每个岛（30）具有与全局控制器（42）通信的本地控制器（36）。 主要控制参数是例如。 电源电压，阈值电压和时钟频率。
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公开(公告)号：US20080106327A1
公开(公告)日：2008-05-08
申请号：US11629716
申请日：2005-06-09
IPC分类号： G05F3/02
CPC分类号： G06F1/3203 , G06F1/28 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to a method and circuit arrangement for controlling performance of an integrated circuit in response to a monitored performance indicator, wherein power supply of the integrated circuit is controlled based on said performance indicator. At least one of a noise level of the controlled power supply and a clock frequency generated in said integrated circuit is monitored and a respective control signal is fed back to the controlling function if the checking result is not within a predetermined range. Thereby, an simple and easily extendable automatic adaptation to process variations can be achieved.
摘要翻译： 本发明涉及一种用于响应于监视的性能指示器来控制集成电路的性能的方法和电路装置，其中基于所述性能指标来控制集成电路的电源。 如果检查结果不在预定范围内，则监视受控电源的噪声电平和在所述集成电路中产生的时钟频率中的至少一个并将相应的控制信号反馈给控制功能。 因此，可以实现简单且易于扩展的自动适应过程变化。
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公开(公告)号：US08120410B2
公开(公告)日：2012-02-21
申请号：US11629768
申请日：2005-06-09
IPC分类号： G05F1/10
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3243 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/172
摘要： The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a variable resistor means is locally controlled so as to individually adjust power supply for each of said at least two electrically isolated circuit regions (10) based on the at least one monitored working parameter. Thereby, a fast and simple control functionality with low area overhead can be provided.
摘要翻译： 本发明涉及一种用于控制集成电路中的电源的电路装置和方法，其中监控至少一个电隔离电路区域（10）的至少一个工作参数，并且可变电阻器装置的电导率被局部控制 用于基于所述至少一个被监视的工作参数单独地调节所述至少两个电隔离电路区域（10）中的每一个的电源。 因此，可以提供具有低面积开销的快速且简单的控制功能。
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公开(公告)号：US07930577B2
公开(公告)日：2011-04-19
申请号：US11629716
申请日：2005-06-09
IPC分类号： G06F1/28
CPC分类号： G06F1/3203 , G06F1/28 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to a method and circuit arrangement for controlling performance of an integrated circuit in response to a monitored performance indicator, wherein power supply of the integrated circuit is controlled based on said performance indicator. At least one of a noise level of the controlled power supply and a clock frequency generated in said integrated circuit is monitored and a respective control signal is fed back to the controlling function if the checking result is not within a predetermined range. Thereby, an simple and easily extendable automatic adaptation to process variations can be achieved.
摘要翻译： 本发明涉及一种用于响应于监视的性能指示器来控制集成电路的性能的方法和电路装置，其中基于所述性能指标来控制集成电路的电源。 如果检查结果不在预定范围内，则监视受控电源的噪声电平和在所述集成电路中产生的时钟频率中的至少一个并将相应的控制信号反馈给控制功能。 因此，可以实现简单且易于扩展的自动适应过程变化。
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公开(公告)号：US20100281245A1
公开(公告)日：2010-11-04
申请号：US11813863
申请日：2006-01-10
申请人： Francesco Pessolano , Rinze L.M.P. Meijer , Jose De Jesus Pineda De Gyvez , Marcus J.M. Heijligers
发明人： Francesco Pessolano , Rinze L.M.P. Meijer , Jose De Jesus Pineda De Gyvez , Marcus J.M. Heijligers
IPC分类号： G06F9/00
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A digital system 1 comprises receiving means (5) for receiving one or more performance indicators or parameters from software (6) controlling the execution of an application (3). Based on the performance indicators received by the receiving means (5), a tuning circuit (7) is provided for tuning the frequency (f), supply voltage (Vdd) and/or the transistor threshold voltage (Vb) of the digital system (1). In addition, pipeline configuration means (8) are provided for configuring the pipeline of the digital system (1) based on a pipeline depth determined by selecting means (10). The selecting means (10) is configured to select the pipeline depth (Pd) based on the frequency (f), supply voltage (Vdd), transistor threshold voltage (Vb), and according to whether the application requires maximum throughput or minimum latency.
摘要翻译： 数字系统1包括用于从控制应用程序（3）的执行的软件（6）接收一个或多个性能指示符或参数的接收装置（5）。 基于由接收装置（5）接收的性能指标，提供调谐电路（7），用于调谐数字系统的频率（f），电源电压（Vdd）和/或晶体管阈值电压（Vb） 1）。 此外，提供管线配置装置（8），用于基于由选择装置（10）确定的流水线深度来配置数字系统（1）的流水线。 选择装置（10）被配置为基于频率（f），电源电压（Vdd），晶体管阈值电压（Vb）以及根据应用是否需要最大吞吐量或最小等待时间来选择流水线深度（Pd）。
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公开(公告)号：US20080195878A1
公开(公告)日：2008-08-14
申请号：US11629718
申请日：2005-06-07
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to a control system and method of controlling at least one performance parameter of an integrated circuit. The at least performance parameter is controlled based on a control word. However, the signaled control information is reduced to a binary control signal simply instructing increase or decrease of said at least one performance parameter. This is achieved by modifying the control word in accordance with the binary control signal, e.g., by using the binary control signal to define a binary value shifted into a shift register means (31). Thereby, a fast and simple control functionality can be provided, which does not require any further hardware to adjust the performance parameter.
摘要翻译： 本发明涉及控制集成电路的至少一个性能参数的控制系统和方法。 基于控制字来控制至少性能参数。 然而，信号控制信息被简化为仅指示增加或减少所述至少一个性能参数的二进制控制信号。 这通过例如通过使用二进制控制信号来限定被移入移位寄存器装置（31）的二进制值来根据二进制控制信号修改控制字来实现。 因此，可以提供快速和简单的控制功能，其不需要任何进一步的硬件来调整性能参数。
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公开(公告)号：US07765533B2
公开(公告)日：2010-07-27
申请号：US10511514
申请日：2003-04-04
申请人： Francesco Pessolano
发明人： Francesco Pessolano
IPC分类号： G06F9/45
CPC分类号： G06F9/3885 , G06F9/30065 , G06F9/381 , G06F9/3836
摘要： A processing method and apparatus for processing an information is based on a sequence of instructions, where a repeated sub-sequence is detected in the sequence of instructions and an allocation between a processing resource and the repeated sub-sequence is determined based on an index information indicating the repetition frequency of the repeated sub-sequence. Thus, a combination of a scalable signal processor with automatic task distribution is provided, where the number of memory accesses can be reduced, as the repeated sub-sequence can be allocated to external processing units, which are correspondingly programmed or which use their embedded memory.
摘要翻译： 用于处理信息的处理方法和装置基于指令序列，其中在指令序列中检测到重复子序列，并且基于索引信息确定处理资源与重复子序列之间的分配 指示重复子序列的重复频率。 因此，提供了具有自动任务分配的可伸缩信号处理器的组合，其中可以减少存储器访问的数量，因为可以将重复的子序列分配给相应编程的外部处理单元或者使用其嵌入式存储器 。
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公开(公告)号：US20060190709A1
公开(公告)日：2006-08-24
申请号：US10563646
申请日：2004-07-05
申请人： Francesco Pessolano
发明人： Francesco Pessolano
IPC分类号： G06F9/00
CPC分类号： G06F9/3848
摘要： A system and method for predicting the outcome of a conditional branch within a computer system, the method comprising the steps of identifying (105) the occurrence of a conditional branch, obtaining (106) data relating to system activity since a previous branch, comparing (110) said data with data relating to previous system activity, and predicting (108) the branch outcome based on such comparison. An activity monitor (FIGS. 3-20) may be used to provide the data relating to system activity.
摘要翻译： 一种用于预测计算机系统内的条件分支的结果的系统和方法，所述方法包括以下步骤：识别（105）条件分支的出现，获得（106）与先前分支相关的系统活动的数据，比较（ 110）使用与先前系统活动相关的数据来表示数据，并且基于这样的比较来预测（108）分支结果。 可以使用活动监视器（图3-20）来提供与系统活动有关的数据。
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公开(公告)号：US20050270194A1
公开(公告)日：2005-12-08
申请号：US10527551
申请日：2003-08-06
IPC分类号： H03K5/06 , G01R31/3185 , H01L23/522 , H03M5/02 , H03M5/14
CPC分类号： H04L25/0266 , G01R31/318538 , H01L23/5227 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to a method for coding information in an electronic circuit and an electronic circuit for coding information, said circuit comprising at least two electrically coupled signal paths (X0, X1). The invention is based on the idea that cross-talk between two electrically coupled signal paths (X0, X1) can be utilized to perform logical computation. A signal is propagating on two signal paths (X0, X1) in the form of either rising or falling transitions. The relative delay between the transitions on the two paths (X0, X1) determines the logic value of the output signal (X) to be produced. If the signal on the first paths (X0) propagates faster than the signal on the second path (X1), an output signal (X) having a first logic value is produced. If the signal on the second path (X1) propagates faster than the signal on the first path (X0), an output signal (X) having a second logic value is produced.
摘要翻译： 本发明涉及一种用于编码电子电路中的信息的方法和用于对信息进行编码的电子电路，所述电路包括至少两个电耦合信号路径（X 0，X 1）。 本发明基于以下思想：可以利用两个电耦合信号路径（X 0，X 1）之间的串扰进行逻辑运算。 信号在两个信号路径（X 0，X 1）上以上升或下降转换的形式传播。 两个路径（X 0，X 1）上的转换之间的相对延迟确定要产生的输出信号（X）的逻辑值。 如果第一路径（X 0）上的信号比第二路径（X 1）上的信号传播得快，则产生具有第一逻辑值的输出信号（X）。 如果第二路径（X 1）上的信号比第一路径（X 0）上的信号更快地传播，则产生具有第二逻辑值的输出信号（X）。
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