公开(公告)号：US5224208A

公开(公告)日：1993-06-29

申请号：US494708

申请日：1990-03-16

申请人： Robert H. Miller, Jr. ,  Roger W. Swanson

发明人： Robert H. Miller, Jr. ,  Roger W. Swanson

IPC分类号： G06T11/20 ,  G06T15/04

CPC分类号： G06T15/04

摘要： A method and apparatus for performing the majority of texture map gradient calculations once per polygon so as to increase processing speed in a graphics system. Texture values are identified for each vertex of an input polygon and are interpolated over the polygon in perspective space in order to find the corresponding values at a given pixel within the polygon. The perspective values of the vertices are linearly interpolated across the polygon to determine the value at the given pixel. The texture gradients are then calculated by defining vectors perpendicular and parallel to the horizon of the plane containing the input polygon so that the resulting components may be calculated. The resulting value is the texture gradient, which may then be used to address a texture map to determine the pre-filtered texture value for that point. A hardware implementation performs the necessary calculations for each pixel in the input polygon. The invention so arranged removes artifacts in the texture mapped image at a low cost and at a high speed.

公开(公告)号：US5990912A

公开(公告)日：1999-11-23

申请号：US884573

申请日：1997-06-27

申请人： Roger W. Swanson

发明人： Roger W. Swanson

IPC分类号： G06F12/02 ,  G09G5/393 ,  G06F12/06

CPC分类号： G06F12/0207 ,  G09G5/393 ,  G06F12/0292 ,  G09G2360/122

摘要： A data accessing system provides access data to video display stored in one or more frame buffers via a virtual frame buffer implemented as a phantom port. The virtual frame buffer facilitates remapping between pixel coordinate space and memory address space for both tiled and linear addressing schemes. Generation of virtual linear and virtual tiled addresses is obtained through one or more of shifting, replacing, and concatenating operations. These operations can be implemented to perform very fast in comparison to the multiplication, addition, division, and modulo operations used in conventional display processors, video controllers, and central processing units. In some embodiments of the virtual addresses are converted to addresses in a frame buffer for accessing the frame buffer. Alternate embodiments use a frame buffer adapted to respond directly to generated virtual addresses. The present invention can thus generate addresses for accessing data in a frame buffer and efficiently use data storage capacity in the frame buffer.

摘要翻译： 数据访问系统通过实现为虚拟端口的虚拟帧缓冲器向存储在一个或多个帧缓冲器中的视频显示提供访问数据。 虚拟帧缓冲器有助于对于平铺和线性寻址方案的像素坐标空间和存储器地址空间之间的重映射。 通过移位，替换和连接操作中的一个或多个获得虚拟线性和虚拟平​​铺地址的生成。 与常规显示处理器，视频控制器和中央处理单元中使用的乘法，加法，除法和模运算相比，可以实现这些操作非常快速地执行。 在虚拟地址的一些实施例中，转换为用于访问帧缓冲器的帧缓冲器中的地址。 替代实施例使用适于直接响应于生成的虚拟地址的帧缓冲器。 因此，本发明可以生成用于访问帧缓冲器中的数据的地址，并且有效地使用帧缓冲器中的数据存储容量。

公开(公告)号：US06831653B2

公开(公告)日：2004-12-14

申请号：US09919551

申请日：2001-07-31

申请人： David Kehlet ,  Nandini Ramani ,  Yan Yan Tang ,  Roger W. Swanson

发明人： David Kehlet ,  Nandini Ramani ,  Yan Yan Tang ,  Roger W. Swanson

IPC分类号： G09G536

CPC分类号： G06T1/60

摘要： A system and method for packing pixels together to provide a increased fill rate in a frame buffer hardware in the graphics system. The graphics system may be configured to receive and rasterize graphics data at a faster cycle rate than the system's frame buffer memory fill rate. The output from the rasterization hardware may be stored in a FIFO memory that is configured to selectively shift pixels in order to improve fill rate performance. The FIFO memory may be configured to ensure that the pixels meet certain criteria in order to prevent page faults and interleave conflicts that could reduce the fill rate. The FIFO memory may also be configured to remove empty cycles that occur as a result of the pixel packing.

摘要翻译： 一种用于将像素打包在一起以在图形系统中的帧缓冲器硬件中提供增加的填充率的系统和方法。 图形系统可以被配置为以比系统的帧缓冲存储器填充速率更快的周期速率接收和光栅化图形数据。 光栅化硬件的输出可以存储在FIFO存储器中，FIFO存储器被配置为选择性地移位像素以便提高填充率性能。 FIFO存储器可以被配置为确保像素满足特定标准，以便防止可能降低填充率的页错误和交错冲突。 FIFO存储器还可以被配置为去除由于像素打包而发生的空循环。

公开(公告)号：US5840143A

公开(公告)日：1998-11-24

申请号：US646700

申请日：1996-05-03

申请人： Roger W. Swanson

发明人： Roger W. Swanson

IPC分类号： B42D15/10 ,  B32B31/00

CPC分类号： B42D25/23 ,  B42D25/00 ,  B42D25/47 ,  B42D25/346 ,  Y10T156/1049 ,  Y10T156/1051 ,  Y10T156/1057 ,  Y10T156/1062 ,  Y10T156/1064 ,  Y10T156/1082

摘要： A method of making an identification card by advancing a continuous web having a first side and a second side along a predetermined path and coating a first portion of the first side with a release agent. The first portion and a second portion of the first side are then coated with a pressure sensitive adhesive, the second portion being adjacent to the first portion and about the same size as the first portion. Next, a sheet of clear plastic is adhered to the adhesive so that the plastic overlays the first and second portions. The plastic sheet and the web are then perforated or die cut around the outer periphery of the first and second portions. The web is also perforated or die cut between the first and second portions. Next, only the first portion of the web is then removed from the plastic sheet and the second portion of the web to expose one-half of the plastic sheet and the adhesive thereon while maintaining the entire second portion with the plastic sheet. The exposed half of the plastic sheet is then folded over the second portion and adhered to the second side of the second portion.

摘要翻译： 一种通过沿着预定路径推进具有第一侧和第二侧的连续卷材并用剥离剂涂覆第一侧的第一部分来制造识别卡的方法。 然后用压敏粘合剂涂覆第一侧的第一部分和第二部分，第二部分与第一部分相邻并且与第一部分大致相同的尺寸。 接下来，将一片透明塑料粘附到粘合剂上，使得塑料覆盖第一和第二部分。 然后围绕第一和第二部分的外周对塑料片材和纤维网进行穿孔或模切。 网也在第一和第二部分之间穿孔或模切。 接下来，仅将第一部分的纤维网从塑料片和纤维网的第二部分中除去，从而将塑料片和胶粘剂的一半暴露在其上，同时用塑料片保持整个第二部分。 然后将塑料片的暴露的一半折叠在第二部分上并粘附到第二部分的第二侧。

公开(公告)号：US5421028A

公开(公告)日：1995-05-30

申请号：US221271

申请日：1994-03-31

申请人： Roger W. Swanson

发明人： Roger W. Swanson

IPC分类号： G06F9/38 ,  G06T1/20

CPC分类号： G06F9/3867 ,  G06T1/20

摘要： A pipelined processing system in which context switching for each of the pipelined processing circuits within the pipeline may be accomplished without flushing the data from the pipeline. This is accomplished by sending the pipeline commands and data together through the pipeline and differentiating the commands from the data using a flag added to the commands and data which specifies whether the associated data word is a command or data. During operation of the pipeline, when the input data is received by one of the pipelined processing circuits in the pipeline, the flag is checked to see if the associated data word includes a command. If the associated data word includes data to be processed, it is processed in accordance with the current configuration of the pipeline. However, if the associated data word includes a command for setup and control and the like, each pipelined processing circuit within the pipeline compares its identification value with a tag field in the command to determine whether it is to be reconfigured by that command. If it is to be reconfigured by that command, the appropriate context switching and the like takes place. However, if the current pipelined processing circuit is not to be reconfigured by that command, that command is passed through the current pipelined processing circuit unprocessed so that a similar determination may be made by the next pipelined processing circuit in the pipeline. As a result, setup and control commands for the pipelined processing circuits may be passed through the data processing pipeline along with the data in the desired processing order such that a pipeline data flush is not necessary between reconfigurations of the pipelined processing circuits. Since the pipeline need not be flushed when processes are changed, processing efficiency and throughput are substantially improved.

摘要翻译： 一种流水线处理系统，其中可以在不从流水线冲洗数据的情况下实现流水线内的每个流水线处理电路的上下文切换。 这是通过流水线命令和数据通过流水线一起发送完成的，并使用添加到指定关联数据字是命令还是数据的命令和数据的标志来区分命令与数据。 在流水线操作期间，当输入数据被流水线中的一个流水线处理电路接收时，检查该标志以查看相关联的数据字是否包括命令。 如果相关联的数据字包括要处理的数据，则根据流水线的当前配置进行处理。 然而，如果相关联的数据字包括用于建立和控制的命令等，则流水线内的每个流水线处理电路将其标识值与该命令中的标签字段进行比较，以确定是否由该命令重新配置。 如果要由该命令重新配置，则进行适当的上下文切换等。 然而，如果当前流水线处理电路不被该命令重新配置，则该命令通过未处理的当前流水线处理电路，使得可以通过流水线处理电路进行类似的确定。 因此，流水线处理电路的设置和控制命令可以以期望的处理顺序与数据一起传递通过数据处理流水线，使得在流水线处理电路的重新配置之间不需要流水线数据刷新。 由于当改变流程时不需要冲洗流水线，因此大大提高了处理效率和吞吐量。

公开(公告)号：US5222204A

公开(公告)日：1993-06-22

申请号：US493189

申请日：1990-03-14

申请人： Roger W. Swanson

发明人： Roger W. Swanson

IPC分类号： G06T15/00 ,  G06F17/17 ,  G06T3/00 ,  G06T15/20 ,  G06T15/80

CPC分类号： G06T3/00 ,  G06F17/175

摘要： A method and apparatus for interpolating pixels to be displayed on a display screen so as to account for the nonlinearity of distance changes in the perspective projection of a 3-D object onto the display for corresponding linear distance changes in 3-D world space. Each pixel of an input polygon to be displayed on the display screen is given a perspective value in world coordinates for each display point, and this value is passed through the graphics processor along with the shading parameters associated with the each display point. The respective shading parameters for each display point are then scaled by the perspective value for each display point to account for the effects of perspective foreshortening of the displayed object on the display screen. Since no translation to world coordinates is required for the perspective scaling, fast hardware circuitry may be used. The rendered image of the invention has much improved color accuracy since the shading more closely reflects the effects of changing perspective in world space.

公开(公告)号：US5025405A

公开(公告)日：1991-06-18

申请号：US421298

申请日：1989-10-11

申请人： Roger W. Swanson

发明人： Roger W. Swanson

IPC分类号： G06F17/17 ,  G06T17/00

CPC分类号： G06F17/17 ,  G06T17/00

摘要： A pipelined interpolator precomputes both integer and fractional portions of the slope of the function to be interpolated. The fractional portions of the starting value of the dependent variable to be incremented and the fractional value of the slope by which the increment occurs are each scaled to allow integer arithmetic. The scaled fractional portion of the starting value of the dependent variable is offset by a constant to allow carry-outs to be detected with the comparison "greater than or equal to zero." The occurrence of a carry-out causes the (unscaled) integer portion of the dependent variable to be incremented by the (unscaled) integer portion of the slope. A selected one of two pairs of simultaneous integer additions on the sets of the integer portion and the scaled fractional portion of the dependent variable will be performed. One pair is selected when the carry-out from the scaled fractional portion did not occur. The other pair is selected when it did. The values produced by the selected pair of additions are fed to the next stage in the pipeline and allowed to actually update the dependent variable's integer and scaled fractional portions.

摘要翻译： 流水线内插器预先计算要内插的函数的斜率的整数和小数部分。 要增加的因变量的起始值的小数部分和发生增量的斜率的分数值都被缩放以允许整数运算。 因变量的起始值的缩放分数部分被一个常数偏移，以允许通过比较“大于或等于零”来检测进位。 出现进位导致因变量的（未缩放）整数部分增加斜率的（未缩放）整数部分。 将对整数部分的集合和从属变量的缩放分数部分执行两对同时整数的选择中的一个。 当没有发生比例缩小部分的进位时，选择一对。 另一对是在选择的时候。 由所选择的一对加法产生的值被馈送到流水线中的下一级，并允许实际更新因变量的整数和缩放的分数部分。