公开(公告)号：US07480298B2

公开(公告)日：2009-01-20

申请号：US11017570

申请日：2004-12-20

申请人： Robert S. Blackmore ,  Steven J. Martin

发明人： Robert S. Blackmore ,  Steven J. Martin

IPC分类号： G06F12/02

CPC分类号： G06F12/1081

摘要： A method is provided for operating a communications adapter employed in a multinode data processing system in a fashion which enhances the performance of remote direct memory access data transfers. The system is provided with pointers and a table which are employed to determine whether or not an address which has been supplied for the transfer has already been mapped to a real address at the source or destination node. The table is also preferably provided with counters which can be incremented or decremented to enable the use of least recently used mechanisms at the upper level protocol layers to more efficiently control the setting and resetting of table entries.

摘要翻译： 提供了一种用于以增强远程直接存储器访问数据传输的性能的方式操作在多节点数据处理系统中使用的通信适配器的方法。 该系统提供有指针和表，其用于确定已经为传送提供的地址是否已经被映射到源节点或目的地节点处的实际地址。 该表还优选地设置有可以递增或递减的计数器，以使得能够在上层协议层使用最近最少使用的机制来更有效地控制表条目的设置和重置。

公开(公告)号：US07430615B2

公开(公告)日：2008-09-30

申请号：US11017456

申请日：2004-12-20

申请人： Robert S. Blackmore ,  Piyush Chaudhary ,  Jason E. Goscinski ,  Leonard W. Helmer, Jr. ,  John S. Houston ,  Steven J. Martin

发明人： Robert S. Blackmore ,  Piyush Chaudhary ,  Jason E. Goscinski ,  Leonard W. Helmer, Jr. ,  John S. Houston ,  Steven J. Martin

IPC分类号： G06F15/16 ,  G06F17/00

CPC分类号： H04L67/1097 ,  H04L67/12 ,  H04L69/14 ,  H04L69/326

摘要： In remote direct memory access (RDMA) transfers in a multinode data processing system in which the nodes communicate with one another through communication adapters coupled to a switch or network, there is a need for the system to ensure efficient memory protection mechanisms across jobs. A method is thus desired for addressing virtual memory on local and remote servers that is independent of the process ID on the local and/or remote node. The use of global Translation Control Entry (TCE) tables that are accessed/owned by RDMA jobs and are managed by a device driver in conjunction with a Protocol Virtual Offset (PVO) address format solves this problem.

摘要翻译： 在多节点数据处理系统中的远程直接存储器访问（RDMA）传输中，其中节点通过耦合到交换机或网络的通信适配器彼此通信，所以系统需要确保跨作业的有效的存储器保护机制。 因此，需要一种方法来解决本地和远程服务器上与本地和/或远程节点上的进程ID无关的虚拟内存。 使用由RDMA作业访问/拥有并由设备驱动程序与协议虚拟偏移（PVO）地址格式一起管理的全局翻译控制条目（TCE）表解决了此问题。

公开(公告)号：US08023417B2

公开(公告)日：2011-09-20

申请号：US11017574

申请日：2004-12-20

申请人： Robert S. Blackmore ,  Fu Chung Chang ,  Piyush Chaudhary ,  Jason E. Goscinski ,  Rama K. Govindaraju ,  Leonard W. Helmer, Jr. ,  Peter H. Hochschild ,  John S. Houston ,  Steven J. Martin ,  Donald G. Grice

发明人： Robert S. Blackmore ,  Fu Chung Chang ,  Piyush Chaudhary ,  Jason E. Goscinski ,  Rama K. Govindaraju ,  Leonard W. Helmer, Jr. ,  Peter H. Hochschild ,  John S. Houston ,  Steven J. Martin ,  Donald G. Grice

IPC分类号： H04L12/56 ,  H04L9/00 ,  H04L29/06 ,  G06F15/173

CPC分类号： H04L1/0079 ,  G06F11/1443 ,  H04L1/1809 ,  H04L2001/0097

摘要： In remote direct memory access transfers in a multinode data processing system in which the nodes communicate with one another through communication adapters coupled to a switch or network, failures in the nodes or in the communication adapters can produce the phenomenon known as trickle traffic, which is data that has been received from the switch or from the network that is stale but which may have all the signatures of a valid packet data. The present invention addresses the trickle traffic problem in two situations: node failure and adapter failure. In the node failure situation randomly generated keys are used to reestablish connections to the adapter while providing a mechanism for the recognition of stale packets. In the adapter failure situation, a round robin context allocation approach is used with adapter state contexts being provided with state information which helps to identify stale packets.

摘要翻译： 在多节点数据处理系统中的远程直接存储器访问传输中，其中节点通过耦合到交换机或网络的通信适配器彼此通信，节点或通信适配器中的故障可能产生称为流量流量的现象， 已经从交换机接收到的数据或者来自网络的数据已经过时，但是可能具有有效分组数据的所有签名。 本发明解决了两种情况下的涓流流量问题：节点故障和适配器故障。 在节点故障情况下，随机生成的密钥用于重新建立与适配器的连接，同时提供用于识别过时数据包的机制。 在适配器故障情况下，使用循环上下文分配方法，适配器状态上下文被提供有状态信息，其有助于识别过时的分组。

公开(公告)号：US07813369B2

公开(公告)日：2010-10-12

申请号：US11017406

申请日：2004-12-20

申请人： Robert S. Blackmore ,  Fu Chung Chang ,  Piyush Chaudhary ,  Kevin J. Gildea ,  Jason E. Goscinski ,  Rama K. Govindaraju ,  Donald G. Grice ,  Leonard W. Helmer, Jr. ,  Patricia E. Heywood ,  Peter H. Hochschild ,  John S. Houston ,  Chulho Kim ,  Steven J. Martin

发明人： Robert S. Blackmore ,  Fu Chung Chang ,  Piyush Chaudhary ,  Kevin J. Gildea ,  Jason E. Goscinski ,  Rama K. Govindaraju ,  Donald G. Grice ,  Leonard W. Helmer, Jr. ,  Patricia E. Heywood ,  Peter H. Hochschild ,  John S. Houston ,  Chulho Kim ,  Steven J. Martin

IPC分类号： G06F13/14

CPC分类号： H04L67/1097

摘要： In a multinode data processing system in which nodes exchange information over a network or through a switch, a structure and mechanism is provided within the realm of Remote Direct Memory Access (RDMA) operations in which DMA operations are present on one side of the transfer but not the other. On the side in which the transfer is not carried out in DMA fashion, transfer processing is carried out under program control; this is in contrast to the transfer on the DMA side which is characteristically carried out in hardware. Usage of these combination processes is useful in programming situations where RDMA is carried out to or from contiguous locations in memory on one side and where memory locations on the other side is noncontiguous. This split mode of transfer is provided both for read and for write operations.

摘要翻译： 在其中节点通过网络或通过交换机交换信息的多节点数据处理系统中，在远程直接存储器访问（RDMA）操作的领域内提供了结构和机制，其中DMA操作存在于传输的一侧，但是 不是其他的 在DMA方式不进行传输的一方，传送处理在程序控制下进行; 这与在硬件上进行特征性的DMA侧的传输相反。 这些组合过程的使用对于在一侧执行RDMA到存储器中的连续位置并且另一侧上的存储器位置不连续地执行RDMA的编程情况是有用的。 这种分离传输模式为读取和写入操作都提供。

公开(公告)号：US08327101B2

公开(公告)日：2012-12-04

申请号：US12024526

申请日：2008-02-01

申请人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

发明人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

IPC分类号： G06F12/02

CPC分类号： G06F12/0815 ,  G06F9/30032 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30087 ,  G06F9/3017 ,  G06F9/3877 ,  G06F12/10

摘要： A data processing system includes a mechanism for completing an asynchronous memory move (AMM) operation in which the processor receives an AMM ST instruction and processes a processor-level move of data in virtual address space and an asynchronous memory mover then completes a physical move of the data within the real address space (memory). A status/control field of the AMM ST instruction includes an indication of a requested treatment of the lower level cache(s) on completion of the AMM operation. When the status/control field indicates an update to at least one cache should be performed, the asynchronous memory mover automatically forwards a copy of the data from the data move to the lower level cache, and triggers an update of a coherency state for a cache line in which the copy of the data is placed.

摘要翻译： 数据处理系统包括用于完成异步存储器移动（AMM）操作的机制，其中处理器接收AMM ST指令并处理虚拟地址空间中的数据的处理器级移动，然后异步存储器移动器完成物理移动 实际地址空间（内存）中的数据。 AMM ST指令的状态/控制字段在完成AMM操作时包括对低级缓存的请求处理的指示。 当状态/控制字段指示应该执行至少一个缓存的更新时，异步存储器移动器自动将数据的副本从数据移动转发到较低级的高速缓存，并触发高速缓存的一致性状态的更新 其中放置数据副本的行。

公开(公告)号：US08214604B2

公开(公告)日：2012-07-03

申请号：US12024367

申请日：2008-02-01

申请人： Lakshminarayana B. Armilli ,  Robert S. Blackmore ,  Chulho Kim ,  Ramakrishnan Rajamony ,  Hanhong Xue

发明人： Lakshminarayana B. Armilli ,  Robert S. Blackmore ,  Chulho Kim ,  Ramakrishnan Rajamony ,  Hanhong Xue

IPC分类号： G06F13/00

CPC分类号： G06F12/0284 ,  G06F12/109 ,  G06F2212/656

摘要： A method and data processing system for performing fence operations within a global shared memory (GSM) environment having a local task executing on a processor and providing GSM commands for processing by a host fabric interface (HFI) window that is allocated to the task. The HFI window has one or more registers for use during local fence operations. A first register tracks a first count of task-issued GSM commands, and a second register tracks a second count of GSM operations being processed by the HFI. The processing logic detects a locally-issued fence operation, and responds by performing a series of operations, including: automatically stopping the task from issuing additional GSM commands; monitoring for completion of all the task-issued GSM commands at the HFI; and triggering a resumption of issuance of GSM commands by the task when the completion of all previous task-issued GSM commands is registered by the HFI.

摘要翻译： 一种用于在全局共享存储器（GSM）环境内执行栅栏操作的方法和数据处理系统，其具有在处理器上执行的本地任务并提供用于由分配给该任务的主机结构接口（HFI）窗口进行处理的GSM命令。 HFI窗口有一个或多个寄存器用于本地栅栏操作。 第一寄存器跟踪任务发出的GSM命令的第一计数，第二寄存器跟踪由HFI正在处理的GSM操作的第二计数。 处理逻辑检测本地发出的围栏操作，并通过执行一系列操作进行响应，包括：自动停止任务发出附加的GSM命令; 监测在HFI完成所有任务发布的GSM命令; 并且当HFI注册所有先前任务发出的GSM命令的完成时，通过任务触发恢复发出GSM命令。

公开(公告)号：US08116210B2

公开(公告)日：2012-02-14

申请号：US12126371

申请日：2008-05-23

申请人： Robert S. Blackmore ,  Amy X. Chen ,  Scott D. Epter ,  Chulho Kim ,  Rajeev Sivaram

发明人： Robert S. Blackmore ,  Amy X. Chen ,  Scott D. Epter ,  Chulho Kim ,  Rajeev Sivaram

IPC分类号： G01R31/08 ,  G06F11/00

CPC分类号： B60R25/1003

摘要： Epoch numbers are maintained in a pair wise fashion at a plurality of communication endpoints to provide communication consistency and recovery from a range of failure conditions including total or partial node failure and subsequent recovery. Once an epoch state inconsistency is recognized, negotiation procedures provide an effective mechanism to reestablish valid communication links without the need to employ global variables which inherently possess greater transmission and overhead requirements needed to maintain communications. Renegotiation of recognizably valid epoch numbers occurs on a pair wise basis.

摘要翻译： 在多个通信端点以成对方式保持时代号，以从包括全部或部分节点故障和随后恢复的一系列故障条件提供通信一致性和恢复。 一旦识别出时代状态不一致，谈判程序就提供了有效的机制来重新建立有效的通信链路，而不需要使用固有地拥有维持通信所需的更大的传输和开销要求的全局变量。 可识别的有效时代数的重新协商是以双重依据为基础进行的。

公开(公告)号：US08095758B2

公开(公告)日：2012-01-10

申请号：US12024613

申请日：2008-02-01

申请人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

发明人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

IPC分类号： G06F12/02 ,  G06F12/04

CPC分类号： G06F9/30032 ,  G06F12/0831 ,  G06F12/0862 ,  G06F12/10

摘要： A data processing system has a processor and a memory coupled to the processor and an asynchronous memory mover coupled to the processor. The asynchronous memory mover has registers for receiving a set of parameters from the processor, which parameters are associated with an asynchronous memory move (AMM) operation initiated by the processor in virtual address space, utilizing a source effective address and a destination effective address. The asynchronous memory mover performs the AMM operation to move the data from a first physical memory location having a source real address corresponding to the source effective address to a second physical memory location having a destination real address corresponding to the destination effective address. The asynchronous memory mover has an associated off-chip translation mechanism. The AMM operation thus occurs independent of the processor, and the processor continues processing other operations independent of the AMM operation.

摘要翻译： 数据处理系统具有耦合到处理器的处理器和存储器以及耦合到处理器的异步存储器移动器。 异步存储器移动器具有用于从处理器接收一组参数的寄存器，这些参数与虚拟地址空间中由处理器发起的异步存储器移动（AMM）操作相关联，利用源有效地址和目的地有效地址。 异步存储器移动器执行AMM操作以将来自具有与源有效地址相对应的源实际地址的第一物理存储器位置的数据移动到具有与目的地有效地址相对应的目的地实际地址的第二物理存储器位置。 异步存储器移动器具有相关的片外转换机制。 因此，AMM操作独立于处理器，并且处理器继续处理独立于AMM操作的其他操作。

公开(公告)号：US07937570B2

公开(公告)日：2011-05-03

申请号：US12024546

申请日：2008-02-01

申请人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Ronald N. Kalla ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

发明人： Ravi K. Arimilli ,  Robert S. Blackmore ,  Ronald N. Kalla ,  Chulho Kim ,  Balaram Sinharoy ,  Hanhong Xue

IPC分类号： G06F9/00 ,  G06F13/00

CPC分类号： G06F9/30043 ,  G06F9/30032 ,  G06F9/3834 ,  G06F9/3885

摘要： A data processing system has a processor, a memory, and an instruction set architecture (ISA) that includes: an asynchronous memory mover (AMM) store (ST) instruction that initiates an asynchronous memory move operation that moves data from a first memory location having a first real address to a second memory location having a second real address by: (a) first performing a move of the data in virtual address space utilizing a source effective address a destination effective address; and (b) when the move is completed, completing a physical move of the data to the second memory location, independent of the processor. The ISA further provides an AMM terminate ST instruction for stopping an ongoing AMM operation before completion of the AMM operation, and a LD CMP instruction for checking a status of an AMM operation.

摘要翻译： 数据处理系统具有处理器，存储器和指令集架构（ISA），其包括：异步存储器移动器（AMM）存储（ST）指令，其启动异步存储器移动操作，其从具有第一存储器位置的第一存储器位置移动数据， 具有第二实际地址的第二存储器位置的第一实际地址：（a）首先使用源有效地址执行虚拟地址空间中的数据移动目的地有效地址; 和（b）当移动完成时，完成数据到第二存储器位置的物理移动，而与处理器无关。 ISA还提供用于在完成AMM操作之前停止正在进行的AMM操作的AMM终止ST指令，以及用于检查AMM操作的状态的LD CMP指令。

公开(公告)号：US07921261B2

公开(公告)日：2011-04-05

申请号：US11958668

申请日：2007-12-18

申请人： Robert S. Blackmore ,  Ramakrishnan Rajamony

发明人： Robert S. Blackmore ,  Ramakrishnan Rajamony

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F9/5016 ,  G06F12/0284 ,  G06F12/109 ,  G06F2212/656

摘要： A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a respective system call to request reservation, without allocation of backing storage in physical memory, of a global address space defined by a range of effective addresses as global shared memory accessible to all of the multiple tasks within the parallel job. At least two of the tasks within the parallel job allocate global address spaces including a same effective address.

摘要翻译： 一种操作数据处理系统的方法包括在数据处理系统的多个节点上执行的并行作业中的每个，发出相应的系统调用以请求预留，而不在物理存储器中分配备份存储器，以定义全局地址空间 通过一系列有效地址作为并行作业内的所有多个任务可访问的全局共享存储器。 并行作业中的至少两个任务分配全局地址空间，包括相同的有效地址。