Active address table
    1.
    发明申请
    Active address table 审中-公开
    活动地址表

    公开(公告)号:US20070078879A1

    公开(公告)日:2007-04-05

    申请号:US11240977

    申请日:2005-09-30

    IPC分类号: G06F7/00

    CPC分类号: G06F12/0831 G06F12/0813

    摘要: A structure referred to as an Active Address Table (AAT) may be used for cache coherence conflict resolution. The AAT may function to detect conflicting coherent requests to the same address and may ensure that each requesting entity receives a copy of the requested cache line in a cache line state-maintaining manner.

    摘要翻译: 称为活动地址表(AAT)的结构可用于高速缓存一致冲突解决。 AAT可以用于检测对相同地址的冲突相干请求,并且可以确保每个请求实体以高速缓存行状态维护方式接收所请求的高速缓存行的副本。

    Method and apparatus for disabling a clock signal within a multithreaded processor
    4.
    发明授权
    Method and apparatus for disabling a clock signal within a multithreaded processor 有权
    用于在多线程处理器内禁用时钟信号的方法和装置

    公开(公告)号:US06883107B2

    公开(公告)日:2005-04-19

    申请号:US10095357

    申请日:2002-03-08

    摘要: A method includes maintaining an indication of a pending event with respect to each of a number of threads supported within a multithreaded processor. An indication is also maintained of an active or inactive state for each of the multiple threads. A clock disable condition is detected. This clock disable condition may be indicated by the absence of pending events with respect to each of the multiple threads and an inactive state for each of the multiple threads. A clocks signal, if enabled, is then disabled with respect to at least one functional unit within the multithreaded processor responsive to the detection of the clock disable condition.

    摘要翻译: 一种方法包括相对于在多线程处理器中支持的多个线程中的每一个来维护待决事件的指示。 对于多个线程中的每一个,还保持指示为活动状态或非活动状态。 检测到时钟禁止条件。 该时钟禁用条件可以由相对于多个线程中的每个线程的不存在的事件以及针对多个线程中的每一个的不活动状态来指示。 响应于检测到时钟禁止条件,相对于多线程处理器内的至少一个功能单元,如果允许时钟信号被禁用。