Methods for manufacturing solid state ionic devices
    3.
    发明授权
    Methods for manufacturing solid state ionic devices 失效
    制造固态离子装置的方法

    公开(公告)号:US5171413A

    公开(公告)日:1992-12-15

    申请号:US760445

    申请日:1991-09-16

    摘要: A multilayer, thin film solid state ionic device usable as an electrochromic window and/or as a rechargeable battery and a method for its manufacture. In one embodiment, the device comprises a transparent substrate and a thin film, five layered coating, the coating being deposited onto the substrate. The device is made by depositing a first layer of indium tin oxide onto the substrate, depositing a second layer of tungsten trioxide onto the first layer, inserting a quantity of lithium ions into the second layer so as to form a lithium-enriched second layer, depositing a third layer of lithium niobate onto the lithium-enriched second layer, sputter depositing a fourth layer of LiCoO.sub.2 onto the third layer, whereby the fourth layer is lithium-deficient, applying, in the presence of a plasma, a sufficiently large positive electrical potential to the second layer so as to cause virtually all of the lithium ions inserted thereinto to be expelled therefrom, whereby a quantity of lithium ions are added to the fourth layer to ameliorate its lithium deficiency and whereby any lithium ions expelled from the second layer but not needed to cure the deficiency of lithium ions in the fourth layer are expelled into the plasma, and then depositing a fifth layer made of indium oxide onto said fourth layer.

    摘要翻译: 可用作电致变色窗和/或可充电电池的多层薄膜固态离子装置及其制造方法。 在一个实施例中,该装置包括透明基底和薄膜,五层涂层,该涂层沉积在基底上。 该器件通过在衬底上沉积第一层氧化铟锡制成,在第一层上沉积第二层三氧化钨,将一定数量的锂离子插入第二层以形成富含锂的第二层, 将第三层铌酸锂沉积到富锂的第二层上,在第三层上溅射沉积第四层LiCoO 2,由此第四层是缺锂的,在等离子体的存在下,施加足够大的正电 使第二层的电位几乎导致插入其中的所有锂离子被排出,由此在第四层中加入一定量的锂离子以改善其锂缺乏,从而从第二层排出但是 不需要固化第四层中的锂离子的缺陷被排出到等离子体中,然后将由氧化铟制成的第五层沉积到所述第四层上 层。

    Buried junction MOS memory capacitor target for electron beam
addressable memory and method of using same

    公开(公告)号:US4079358A

    公开(公告)日:1978-03-14

    申请号:US729099

    申请日:1976-10-04

    申请人: Floyd O. Arntz

    发明人: Floyd O. Arntz

    摘要: A buried junction MOS memory capacitor target device for electron beam addressable READ/WRITE memories is described along with a method of using the same. The memory capacitor target structure comprises a planar semiconductor substrate of various degrees of complexity having a highly conducting coating providing a low resistance ohmic contact to the substrate backside and an N-type planar semiconductor overlayer forming with the substrate topside a bipolar detector junction. An insulating layer overlies the N-type layer and a conducting coating overlies the insulating layer. The device is employed with an electron beam of sufficient energy to penetrate the latter two layers and to produce carrier-pairs in the N-type overlayer. Electrical access to the device is provided by one contact to the substrate backside and one contact to the conducting coating overlying the insulator. Means are provided within the semiconducting portion of the device for limiting the electrostatic potential difference developed across the bipolar detector junction as a result of changes in the potentials applied to the electrical contacts. This may be achieved by fabricating the semiconducting portion of the device to provide for the occurrance of avalanche conduction within the detector junction whenever the reverse polarity potential difference across the junction exceeds a desired value. Alternatively the reach through effect commonly observed in thin base bipolar transistors when the collector-base potential difference exceeds a critical value can be employed to limit the reverse potential developed across the bipolar detector junction. This may be achieved by employing a planar semiconducting substrate comprised by a thin P-type layer overlying an N-type layer. In operation the design affords a means for applying the desired potential differences across the insulator for the various steps of memory operation and also affords a means for developing a desired reverse polarity potential difference across the buried bipolar detector junction for the duration of the read process.