公开(公告)号：US20160197618A1

公开(公告)日：2016-07-07

申请号：US15067058

申请日：2016-03-10

申请人： Ryan M. FIELD

发明人： Ryan M. FIELD

IPC分类号： H03M1/46 ,  H03M1/06 ,  G06F13/24 ,  H03M1/42

CPC分类号： H03M1/46 ,  G06F13/24 ,  H03M1/06 ,  H03M1/1245 ,  H03M1/42 ,  Y02D10/14

摘要： An analog-to-digital converter circuit is described that includes register space to keep one or more values to establish upper and lower thresholds of the analog-to-digital converter. The analog-to-digital converter circuit also includes first and second comparators to compare an analog input signal against the upper and lower thresholds and to trigger an analog-to-digital conversion process in response to the analog input signal crossing one of the thresholds. The analog-to-digital converter circuit also includes first logic circuitry to discard a result of the analog-to-digital conversion process if the result is within a prior analog-to-digital conversion process's thresholds. The analog-to-digital converter circuit also includes second logic circuitry to provide the result as an output and generate an interrupt if the result is not within the prior analog-to-digital conversion process's thresholds.

摘要翻译： 描述了一种模数转换器电路，其包括用于保持一个或多个值以建立模数转换器的上限和下限阈值的寄存器空间。 模数转换器电路还包括用于将模拟输入信号与上限和下限阈值进行比较的第一和第二比较器，并且响应于模拟输入信号跨过阈值之一触发模数转换过程。 如果结果在先前的模数转换过程的阈值之内，则模数转换器电路还包括第一逻辑电路，以丢弃模数转换过程的结果。 模数转换器电路还包括第二逻辑电路，以将结果提供为输出，并且如果结果不在先前的模数转换过程的阈值内，则产生中断。