公开(公告)号：US5359604A

公开(公告)日：1994-10-25

申请号：US902596

申请日：1992-06-22

申请人： Ryuichi Kondo ,  Haruo Yamashita ,  Tomohiro Shinomiya

发明人： Ryuichi Kondo ,  Haruo Yamashita ,  Tomohiro Shinomiya

IPC分类号： H04J3/06 ,  H04L12/427

CPC分类号： H04J3/0632 ,  H04L12/427

摘要： When input signals from a plurality of input ports are selected and are inserted into the time slots to be output from a single output port and to insert respective signal data into time slots in synchronization with a synchronizing signal, the apparatus is so constructed that selector units (5-i) are provided to correspond to input ports (1-i), and a synchronizing signal generating unit (4) is provided to output, synchronously, a synchronizing signal and selecting signal information for designating a selector unit (5-i); the selector unit (5-i) being provided with a determining unit (6) for determining whether or not the selecting signal information designates the selector.

摘要翻译： 当选择来自多个输入端口的输入信号并将其插入到从单个输出端口输出的时隙中并且将相应的信号数据与同步信号同步地插入到时隙中时，该装置被构造为选择器单元 （5-i）被提供以对应于输入端口（1-i），并且提供同步信号生成单元（4）以同步地输出同步信号和选择用于指定选择器单元（5-i）的信号信息 ）; 选择器单元（5-i）设置有用于确定选择信号信息是否指定选择器的确定单元（6）。

公开(公告)号：US5282206A

公开(公告)日：1994-01-25

申请号：US984925

申请日：1992-12-03

申请人： Tomohiro Ishihara ,  Haruo Yamashita ,  Toshiyuki Sudo ,  Ryuichi Kondo ,  Takaaki Wakisaka

发明人： Tomohiro Ishihara ,  Haruo Yamashita ,  Toshiyuki Sudo ,  Ryuichi Kondo ,  Takaaki Wakisaka

IPC分类号： H04J3/00 ,  H04J3/06 ,  H04L7/08 ,  H04Q11/04

CPC分类号： H04J3/0608 ,  H04J2203/0089

摘要： A synchronous circuit includes a first circuit block operating in synchronism with a first clock signal, and a second circuit block operating in synchronism with a second clock signal having a frequency lower than that of the first clock signal. The first circuit block includes a frame synchronizing circuit for detecting a synchronous pattern contained in input data having a frame format having a supervisory control data part and an information part, the supervisory control data part including pointer information indicative of a beginning of the information part. The first circuit block includes a synchronizing unit for generating, from the synchronous pattern, a synchronizing control signal for synchronizing the operation of the second circuit block with the operation of the first circuit block. The first circuit block includes a pulse generator for generating a first frame pulse signal from the first clock signal. The second circuit block includes an information part detecting unit for generating a second frame pulse signal having a frequency lower than that of the first frame pulse signal from the second clock signal and the synchronizing control signal, the first frame pulse signal being synchronized with the beginning of the information part.

摘要翻译： 同步电路包括与第一时钟信号同步工作的第一电路块和与频率低于第一时钟信号的频率的第二时钟信号同步工作的第二电路块。 第一电路块包括帧同步电路，用于检测包含在具有监视控制数据部分和信息部分的帧格式的输入数据中的同步模式，所述监控控制数据部分包括指示信息部分的开始的指针信息。 第一电路块包括同步单元，用于从同步模式产生用于使第二电路块的操作与第一电路块的操作同步的同步控制信号。 第一电路块包括用于从第一时钟信号产生第一帧脉冲信号的脉冲发生器。 第二电路块包括：信息部分检测单元，用于产生具有比来自第二时钟信号和同步控制信号的第一帧脉冲信号低的频率的第二帧脉冲信号，第一帧脉冲信号与开始同步 的信息部分。

公开(公告)号：US5475675A

公开(公告)日：1995-12-12

申请号：US850829

申请日：1992-03-13

申请人： Ryuichi Kondo ,  Haruo Yamashita ,  Tomohiro Ishihara ,  Toshiyuki Sudo ,  Takaaki Wakisaka

发明人： Ryuichi Kondo ,  Haruo Yamashita ,  Tomohiro Ishihara ,  Toshiyuki Sudo ,  Takaaki Wakisaka

IPC分类号： H04L1/22 ,  H04J3/00 ,  H04L12/70 ,  H04J1/16

CPC分类号： H04L49/552 ,  H04L2012/5627 ,  H04L2012/5674

摘要： According to the present invention, when a current system is switched to a spare system in a transmission system in an asynchronous transfer mode, empty cells transmitted in the current and spare systems are detected, and thereby a timing for switching the current system to the spare system is determined. When no phase difference is existent between the current and spare systems, an empty cell is detected in both the current and spare systems at the same time. Therefore, the current system is switched to the spare system, when an empty cell is detected in both the current and spare systems at the same time. When a shade difference is existent, if an empty cell is detected either in the current or spare systems, another empty cell is inserted in to the systems. Then, the data of the empty cell in a spare system is saved. After the empty cell in a current system passes, the current system is switched to the spare system. When a phase difference of at least one cell is existent, and if an empty cell comes earlier in current system, empty cell are kept inserted form when the empty cell is detected in the current system until an empty cell is detected in the spare system. After that, the current system is switched to the spare system. When an empty cell comes earlier in a spare system, the data of the cell in the spare system is saved from when the empty cell is detected until an empty cell is detected in the current system. After that, the current system is switched to the spare system.

摘要翻译： 根据本发明，当以异步传输模式将当前系统切换到传输系统中的备用系统时，检测在当前系统和备用系统中发送的空单元，从而将当前系统切换到备用 系统确定。 当当前系统和备用系统之间没有相位差时，同时在当前系统和备用系统中检测到一个空单元。 因此，当同时在当前系统和备用系统中检测到一个空单元时，将当前系统切换到备用系统。 当存在阴影差异时，如果在当前或备用系统中检测到空单元，则将另一个空单元插入到系统中。 然后，保存备用系统中的空单元的数据。 当前系统中的空单元通过后，当前系统将切换到备用系统。 当存在至少一个小区的相位差时，如果当前系统中的空单元较早，则当在当前系统中检测到空单元时，空单元被保持插入，直到在备用系统中检测到空单元。 之后，将当前系统切换到备用系统。 当一个空单元在较早的备用系统中时，备用系统中的单元的数据将从检测到空单元到当前系统中检测到空单元之前保存。 之后，将当前系统切换到备用系统。

公开(公告)号：US5859844A

公开(公告)日：1999-01-12

申请号：US703094

申请日：1996-08-26

申请人： Keiichi Kanno ,  Ryuichi Kondo ,  Koya Sakurai ,  Toshifumi Fujimoto

发明人： Keiichi Kanno ,  Ryuichi Kondo ,  Koya Sakurai ,  Toshifumi Fujimoto

IPC分类号： H04L12/931 ,  H04L12/943 ,  H04Q11/04 ,  H04L12/28

CPC分类号： H04L49/405 ,  H04L49/1553 ,  H04L49/30 ,  H04L49/309 ,  H04L49/45 ,  H04Q11/04 ,  H04L49/15 ,  H04L49/3009 ,  H04L49/50 ,  H04L49/552

摘要： A switching unit of a cross connecting device is expanded with no momentary interruption, while data loss and data overlapping is eliminated. To achieve such an expansion, a cross connecting device comprises a base set having a switching unit for determining an output channel based on virtual path information for cell data that is input and for outputting the cell data. An expanded set has a switching unit for receiving the cell data from the base set and cell data from another base set, and for determining an output channel based on virtual path information for both inputs of cell data and for outputting the cell data. A filter prevents the transmission, to the expanded set, of cell data for which the output channel is determined by the switching unit of the base set.

摘要翻译： 交叉连接装置的切换单元不会瞬间中断而被扩展，而数据丢失和数据重叠被消除。 为了实现这种扩展，交叉连接装置包括具有开关单元的基座组，用于基于被输入的单元数据的虚拟路径信息确定输出通道，并输出单元数据。 扩展集合具有用于从基本集合接收小区数据和来自另一个基站的小区数据的切换单元，并且用于基于用于小区数据的两个输入的虚拟路径信息确定输出信道并输出小区数据。 滤波器防止对基站的切换单元确定输出信道的小区数据的扩展集合的传输。

公开(公告)号：US4935920A

公开(公告)日：1990-06-19

申请号：US238046

申请日：1988-08-30

申请人： Atsuki Taniguchi ,  Tomoyuki Ohtsuka ,  Hidetoshi Naitou ,  Ryuichi Kondo

发明人： Atsuki Taniguchi ,  Tomoyuki Ohtsuka ,  Hidetoshi Naitou ,  Ryuichi Kondo

IPC分类号： H04J3/08 ,  H04Q11/04

CPC分类号： H04J3/08

摘要： Disclosed is a drop/insert processing circuit connected to, for example, a broadband subscriber network including a high speed data loop. The circuit is formed in one body comprising a single shift register, a single clock signal generator, a low speed data insertion control circuit, and a low speed data dropping circuit, whereby the circuit scale is reduced and the control is simplified.