公开(公告)号：US06219071B1

公开(公告)日：2001-04-17

申请号：US09209934

申请日：1998-10-06

申请人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Edmundo Rojas ,  Michael S McGrath ,  Ted Rakel ,  Glenn W Strunk ,  Jon L Ashburn ,  S Paul Tucker

发明人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Edmundo Rojas ,  Michael S McGrath ,  Ted Rakel ,  Glenn W Strunk ,  Jon L Ashburn ,  S Paul Tucker

IPC分类号： G06F1516

CPC分类号： G06T1/20

摘要： The invention provides for a system and method for minimizing space requirements and increasing speed in a geometry accelerator for a computer graphics system. In architecture, the system is implemented as follows. The geometry accelerator includes a plurality of processing elements (e.g., an arithmetic logic unit, a multiplier, a divider, a compare mechanism, a clamp mechanism, etc.) and a plurality of control units (e.g., a transform mechanism, a decomposition mechanism, a clip mechanism, a bow-tie mechanism, a light mechanism, a classify mechanism, a plane equation mechanism, a fog mechanism, etc.) that utilize the processing elements for performing data manipulations upon image data. In accordance with the invention, the control units are implemented in a read-only memory (ROM) via microcode. A next address field is associated with each of the microcode instructions and defines a location in the ROM of a next instruction to be executed. A plurality of control unit logic elements correspond respectively with the control units and control instruction branching within their respective control unit by defining the next address field. A branch central intelligence mechanism controls branching between the control units by defining the next address field.

摘要翻译： 本发明提供了一种用于使计算机图形系统的几何加速器中的空间需求最小化并提高速度的系统和方法。 在架构中，系统实现如下。 几何加速器包括多个处理元件（例如，算术逻辑单元，乘法器，分频器，比较机构，钳位机构等）和多个控制单元（例如，变换机构，分解机构 ，夹子机构，蝴蝶结机构，光机构，分类机构，平面方程机构，雾化机构等），其利用处理元件对图像数据进行数据处理。 根据本发明，控制单元通过微代码实现在只读存储器（ROM）中。 下一个地址字段与每个微代码指令相关联，并定义ROM中要执行的下一条指令的位置。 多个控制单元逻辑元件分别对应控制单元和通过定义下一个地址字段在其各自的控制单元内分支的控制指令。 分支中央智能机构通过定义下一个地址字段来控制控制单元之间的分支。

公开(公告)号：US5956047A

公开(公告)日：1999-09-21

申请号：US846363

申请日：1997-04-30

申请人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Edmundo Rojas ,  Michael S McGrath ,  Ted Rakel ,  Glenn W Strunk ,  Jon L Ashburn ,  S Paul Tucker

发明人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Edmundo Rojas ,  Michael S McGrath ,  Ted Rakel ,  Glenn W Strunk ,  Jon L Ashburn ,  S Paul Tucker

IPC分类号： G06F9/26 ,  G06T1/20 ,  G06T11/00 ,  G06F15/16

CPC分类号： G06T1/20

摘要： The invention provides for a system and method for minimizing space requirements and increasing speed in a geometry accelerator for a computer graphics system. In architecture, the system is implemented as follows. The geometry accelerator includes a plurality of processing elements (e.g., an arithmetic logic unit, a multiplier, a divider, a compare mechanism, a clamp mechanism, etc.) and a plurality of control units (e.g., a transform mechanism, a decomposition mechanism, a clip mechanism, a bow-tie mechanism, a light mechanism, a classify mechanism, a plane equation mechanism, a fog mechanism, etc.) that utilize the processing elements for performing data manipulations upon image data. In accordance with the invention, the control units are implemented in a read-only memory (ROM) via microcode. A next address field is associated with each of the microcode instructions and defines a location in the ROM of a next instruction to be executed. A plurality of control unit logic elements correspond respectively with the control units and control instruction branching within their respective control unit by defining the next address field. A branch central intelligence mechanism controls branching between the control units by defining the next address field.

摘要翻译： 本发明提供了一种用于使计算机图形系统的几何加速器中的空间要求最小化并提高速度的系统和方法。 在架构中，系统实现如下。 几何加速器包括多个处理元件（例如，算术逻辑单元，乘法器，分频器，比较机构，钳位机构等）和多个控制单元（例如，变换机构，分解机构 ，夹子机构，蝴蝶结机构，光机构，分类机构，平面方程机构，雾化机构等），其利用处理元件对图像数据进行数据处理。 根据本发明，控制单元通过微代码实现在只读存储器（ROM）中。 下一个地址字段与每个微代码指令相关联，并定义ROM中要执行的下一条指令的位置。 多个控制单元逻辑元件分别对应控制单元和通过定义下一个地址字段在其各自的控制单元内分支的控制指令。 分支中央智能机构通过定义下一个地址字段来控制控制单元之间的分支。

公开(公告)号：US5956042A

公开(公告)日：1999-09-21

申请号：US846364

申请日：1997-04-30

申请人： S Paul Tucker ,  Alan S. Krech, Jr.

发明人： S Paul Tucker ,  Alan S. Krech, Jr.

IPC分类号： G06T1/20 ,  G06F15/00

CPC分类号： G06T1/20

摘要： A system and method computes the color of a plurality of vertices of one or more graphic primitives in a graphics accelerator. The method includes the steps of receiving lighting properties of a primitive vertex and determining whether predetermined lighting properties of the vertex are the same as a previously computed vertex. If predetermined lighting properties are the same as the previously computed vertex, then the method retrieves at least one preprocessed value from a storage location; and utilizes the at least one preprocessed value to compute the vertex color. If, however, the predetermined lighting properties are not the same as the previously computed vertex, then the method computes at least one preprocessed value from the received lighting properties of the primitive vertex, stores the at least one computed preprocessed value in a storage location, and utilizes the at least one preprocessed value to compute the vertex color. The system includes at least one processing unit (e.g., ALU) for performing mathematical operations on lighting properties of a vertex of a graphics primitive. It also includes a storage area for storing predetermined values processed by the processing unit. A receiver is included and configured to receive at least two lighting properties defining a primitive vertex, and a lighting property comparator is configured to compare the at least two lighting properties with previously received lighting properties to determine whether they are the same. Finally a controller is provided and adapted to control the storage and retrieval of values from the storage area and the processing unit, the controller including storage control means responsive to the lighting property comparator configured to save newly processed vertex color values in the operational storage register and to retrieve preprocessed values from the storage area.

摘要翻译： 系统和方法计算图形加速器中的一个或多个图形基元的多个顶点的颜色。 该方法包括以下步骤：接收原始顶点的照明属性并确定顶点的预定照明属性是否与先前计算的顶点相同。 如果预定的照明属性与先前计算的顶点相同，则该方法从存储位置检索至少一个预处理值; 并利用至少一个预处理值来计算顶点颜色。 然而，如果预定的照明属性与先前计算的顶点不同，则该方法根据接收到的原始顶点的照明属性来计算至少一个预处理值，将至少一个计算的预处理值存储在存储位置中， 并利用至少一个预处理值来计算顶点颜色。 该系统包括用于对图形原语的顶点的照明属性执行数学运算的至少一个处理单元（例如，ALU）。 它还包括用于存储由处理单元处理的预定值的存储区域。 接收器被包括并被配置为接收定义原始顶点的至少两个照明属性，并且照明属性比较器被配置为将至少两个照明属性与先前接收的照明属性进行比较，以确定它们是否相同。 最后，提供控制器，用于控制来自存储区域和处理单元的值的存储和检索，控制器包括存储控制装置，其响应于照明属性比较器被配置为将新处理的顶点颜色值保存在操作存储寄存器中，以及 从存储区域检索预处理值。

公开(公告)号：US5912830A

公开(公告)日：1999-06-15

申请号：US846365

申请日：1997-04-30

申请人： Alan S. Krech, Jr. ,  S Paul Tucker

发明人： Alan S. Krech, Jr. ,  S Paul Tucker

IPC分类号： G06F7/556 ,  G06F7/38

CPC分类号： G06F7/556

摘要： A method computes exponentials of a lighting equation in a geometry accelerator. In accordance with one aspect of the invention, the method includes the steps of receiving values for a first term "a" and a second term "x" of an exponential in the form a.sup.x. The method then evaluates at least one of the first and second terms to determine whether it is an integer value. If the evaluating step determines that the at least one of the terms is an integer value, then the method sets a bit in a memory location. Thereafter, the method examines a bit in the memory location. If the bit is set, then the invention executes an integer exponentiation routine to calculate a.sup.x directly in the math core. If, however, the bit is not set, then the invention executes a floating point exponentiation routine to closely approximate the calculation of a.sup.x.

摘要翻译： 一种方法计算几何加速器中的照明方程式的指数。 根据本发明的一个方面，该方法包括以下形式的步骤：接收角度为ax的指数的第一项“a”和第二项“x”的值。 该方法然后评估第一和第二项中的至少一个以确定其是否是整数值。 如果评估步骤确定该项中的至少一个是整数值，则该方法在存储器位置中设置一位。 此后，该方法检查存储器位置中的一点。 如果该位被置位，则本发明执行整数乘幂程序以在数学核心中直接计算ax。 然而，如果该位未设置，则本发明执行浮点乘幂程序以紧密地计算ax的计算。

公开(公告)号：US06184902B2

公开(公告)日：2001-02-06

申请号：US08845975

申请日：1997-04-30

申请人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Glenn W Strunk ,  Michael S McGrath ,  Edmundo Rojas ,  S Paul Tucker ,  Jon L Ashburn ,  Ted Rakel

发明人： Alan S. Krech, Jr. ,  Theodore G. Rossin ,  Glenn W Strunk ,  Michael S McGrath ,  Edmundo Rojas ,  S Paul Tucker ,  Jon L Ashburn ,  Ted Rakel

IPC分类号： G06F1516

CPC分类号： G06F9/261 ,  G06T1/20

摘要： The invention provides for a system and method for minimizing space requirements and increasing speed in a geometry accelerator for a computer graphics system by providing a branch central intelligence mechanism. Architecturally, the geometry accelerator includes a plurality of processing elements (e.g., an arithmetic logic unit, a multiplier, a divider, a compare mechanism, a clamp mechanism, etc.) and a plurality of control units (e.g., a transform mechanism, a decomposition mechanism, a clip mechanism, a bow-tie mechanism, a light mechanism, a classify mechanism, a plane equation mechanism, a fog mechanism, etc.) that utilize the processing elements for performing data manipulations upon image data. In accordance with the invention, the control units are implemented in a read-only memory (ROM) via microcode. A next address field is associated with each of the microcode instructions and defines a location in the ROM of a next instruction to be executed. A plurality of control unit logic elements correspond respectively with the control units and control instruction branching within their respective control unit by defining the next address field. Finally, a branch central intelligence mechanism controls branching between the control units by defining the next address field.

摘要翻译： 本发明提供一种用于通过提供分支中央智能机构来最小化空间需求并增加用于计算机图形系统的几何加速器的速度的系统和方法。 在结构上，几何加速器包括多个处理元件（例如，算术逻辑单元，乘法器，分频器，比较机构，钳位机构等）和多个控制单元（例如，变换机构， 分解机构，夹子机构，蝴蝶结机构，光机构，分类机构，平面方程机构，雾化机构等），其利用处理元件对图像数据执行数据处理。 根据本发明，控制单元通过微代码实现在只读存储器（ROM）中。 下一个地址字段与每个微代码指令相关联，并定义ROM中要执行的下一条指令的位置。 多个控制单元逻辑元件分别对应控制单元和通过定义下一个地址字段在其各自的控制单元内分支的控制指令。 最后，分支中央智能机构通过定义下一个地址字段来控制控制单元之间的分支。

公开(公告)号：US5886711A

公开(公告)日：1999-03-23

申请号：US840361

申请日：1997-04-29

申请人： Theodore G. Rossin ,  Alan S. Krech, Jr. ,  S Paul Tucker

发明人： Theodore G. Rossin ,  Alan S. Krech, Jr. ,  S Paul Tucker

IPC分类号： G06T15/00 ,  G06F15/16

CPC分类号： G06T15/005

摘要： The present invention provides a method and apparatus for processing primitives in a computer graphics display system. The present invention comprises a geometry accelerator for processing polygons to provide two-sided lighting for front and back facing polygons. The geometry accelerator comprises a lighting machine and a memory device in communication with the lighting machine. The geometry accelerator receives command data, vertex data, and parameter data from a central processing unit (CPU) of a computer graphics display system. The vertex data comprises polygon vertex color data, vertex coordinate data and vertex normal data. The parameter data comprises front and back material parameters. The command data comprises information relating to the type of primitive to be processed by the lighting machine. The geometry accelerator looks at the command data to determine whether the polygon is a front or back facing polygon and informs the lighting machine as to whether the polygon is a front or back facing polygon. The lighting machine will then fetch the correct set of material parameters and use them to calculate lighting.

摘要翻译： 本发明提供一种用于在计算机图形显示系统中处理原语的方法和装置。 本发明包括用于处理多边形的几何加速器，以提供前后面向多边形的双面照明。 几何加速器包括照明机和与照明机通信的存储装置。 几何加速器从计算机图形显示系统的中央处理单元（CPU）接收命令数据，顶点数据和参数数据。 顶点数据包括多边形顶点颜色数据，顶点坐标数据和顶点正常数据。 参数数据包括前面和后面的材料参数。 命令数据包括与由照明机处理的原语类型有关的信息。 几何加速器查看命令数据以确定多边形是面向前还是朝后的多边形，并通知照明机是否该多面体是前面或后面的多边形。 然后，照明设备将获取正确的材料参数，并使用它们来计算照明。

公开(公告)号：US5926406A

公开(公告)日：1999-07-20

申请号：US847645

申请日：1997-04-30

申请人： S Paul Tucker ,  Ted Rakel

发明人： S Paul Tucker ,  Ted Rakel

IPC分类号： G06F7/556 ,  G06F7/38

CPC分类号： G06F7/556 ,  G06F7/483

摘要： A novel system and method computes a floating point value of an exponential expression in the form of "a.sup.x " in a geometry accelerator. In accordance with one aspect of the invention, the method includes the steps of receiving the values "a" and x of the exponential expression, where both "a" and x are represented in floating point format. As will be appreciated by those skilled in the art, the values will by supplied by software through an appropriate graphics application program interface (API). The method utilizes a mantissa value of the floating point representation of "a" to index a first value in a first look-up table, the value being an approximation for log2(a). Then, the method multiplies the looked-up value by the value of x to obtain an intermediate result. This intermediate result is then partitioned into a fractional component and an integer component, wherein the fractional component is normalized/converted to floating point format. The method then utilizes a mantissa value of the floating point representation of the fractional component of the intermediate result to index a first value in a second look-up table, the value being an approximation for 2.sup.fract, where fract is the fractional component. Thereafter, the method computing 2.sup.integer, where integer is the integer component. This step may be directly computed by the math core of the geometry accelerator, since it is an integer exponent. Finally, the method multiplies the results of steps that compute the 2.sup.fract and 2.sup.integer values to obtain a final value. This final value is a close approximation of the exponential expression a.sup.x.

摘要翻译： 一种新颖的系统和方法在几何加速器中以“ax”的形式计算指数表达式的浮点值。 根据本发明的一个方面，该方法包括以下步骤：接收指数表达式的值“a”和x，其中“a”和“x”以浮点格式表示。 如本领域技术人员将理解的，值将由软件通过适当的图形应用程序接口（API）提供。 该方法利用“a”的浮点表示的尾数值来对第一查找表中的第一值进行索引，该值是log2（a）的近似值。 然后，该方法将查找值乘以x的值以获得中间结果。 然后将该中间结果划分为分数分量和整数分量，其中分数分量被归一化/转换为浮点格式。 然后，该方法利用中间结果的分数分量的浮点表示的尾数值来索引第二查找表中的第一值，该值是2fract的近似值，其中fract是分数分量。 此后，方法计算2integer，其中integer是整数分量。 该步骤可以由几何加速器的数学核心直接计算，因为它是一个整数指数。 最后，该方法将计算2fract和2integer值的步骤的结果相乘以获得最终值。 该最终值是指数表达式ax的近似值。