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公开(公告)号：US20230371326A1
公开(公告)日：2023-11-16
申请号：US18226229
申请日：2023-07-25
发明人： Seung-Hwan CHO , Wonsuk CHOI , Tetsuhiro TANAKA , Jiryun PARK , Seokje SEONG , Seungwoo SUNG , Jiseon LEE
IPC分类号： H10K59/131 , H10K59/121
CPC分类号： H10K59/131 , H10K59/121
摘要： A display device includes a first active pattern disposed on a substrate, a first gate electrode disposed on the first active pattern, a second active pattern disposed on the first gate electrode, being electrically connected to the first gate electrode, and including an extension part extending in a first direction and a protrusion part protruding from the extension part in a second direction crossing the first direction, and a voltage line disposed on the second active pattern, extending in the first direction, and overlapping the protrusion part in an overlapping region. The voltage line contacts the protrusion part through a first contact, and the first contact entirely overlaps the overlapping region on a plane.
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公开(公告)号：US20210257426A1
公开(公告)日：2021-08-19
申请号：US17160562
申请日：2021-01-28
发明人： Tetsuhiro TANAKA , Yeong-Gyu KIM , Tae Sik KIM , Hee Yeon KIM , Ki Seong SEO , Seung Hyun LEE , Kyeong Woo JANG , Sug Woo JUNG
IPC分类号： H01L27/32 , H01L29/786
摘要： A display device includes a first thin film transistor disposed on a substrate. A first insulating interlayer covers lire first thin film transistor. An active pattern is disposed on the first insulating interlayer. The active pattern includes indium-gallium-zinc oxide (IGZO) having a thickness in a range of about 150 Å to about 400 Å. A gate insulation layer covers the active pattern A gate pattern is disposed on the gate insulation layer. A second insulating interlayer covers the gate pattern.
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公开(公告)号：US20210296367A1
公开(公告)日：2021-09-23
申请号：US17079608
申请日：2020-10-26
发明人： Jung Yub SEO , Tetsuhiro TANAKA , Hee Won YOON , Shin Beom CHOI
IPC分类号： H01L27/12
摘要： A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.
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公开(公告)号：US20230397477A1
公开(公告)日：2023-12-07
申请号：US18118865
申请日：2023-03-08
发明人： Chang Ho YI , Hyun Min CHO , Jung Woo HA , Tetsuhiro TANAKA , Seok Je SEONG
IPC分类号： H01L51/00 , H01L29/423 , H01L29/786
CPC分类号： H10K59/8792 , H01L29/42384 , H10K59/1213 , H10K59/1216 , H01L29/78633 , H01L29/7869
摘要： A display device includes a semiconductor layer on an opposite side to a light-blocking layer, the semiconductor layer including an active layer overlapping the light-blocking layer, a first gate insulator on an opposite side to a buffer film with the active layer therebetween, and a first gate electrode on an opposite side to the active layer with the first gate insulator therebetween, a side surface of the first gate insulator includes a first inclined portion contacting a first surface of the semiconductor layer, and a second inclined portion contacting the first inclined portion and the first gate electrode, and a first angle between the first surface of the semiconductor layer and the first inclined portion is less than a second angle between the first surface of the semiconductor layer and the second inclined portion.
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公开(公告)号：US20210359067A1
公开(公告)日：2021-11-18
申请号：US17202604
申请日：2021-03-16
发明人： Yoon-Jong CHO , Tetsuhiro TANAKA , Young-In HWANG
摘要： A display panel includes a first organic film layer, a first barrier layer disposed on first organic film layer, a shielding pattern disposed on the first barrier layer, a second barrier layer covering the shielding pattern and disposed on first barrier layer, a first active pattern disposed on the second barrier layer and overlapping the shielding pattern in a plan view, a gate electrode disposed on the first active pattern, an emission control line disposed on the first active pattern and adjacent to a first side of the gate electrode in the plan view, an upper compensation control line disposed on the emission control line and adjacent to a second side of gate electrode in the plan view, and a second active pattern disposed on the emission control line.
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公开(公告)号：US20210210518A1
公开(公告)日：2021-07-08
申请号：US16986933
申请日：2020-08-06
发明人： Tetsuhiro TANAKA , Yeong-Gyu KIM , Ki Seong SEO , Seung Hyun LEE , Chang Ho YI
摘要： A display device includes a polycrystalline semiconductor including a channel, a first electrode, and a second electrode of a driving transistor, a first gate insulating layer, a gate electrode of a driving transistor, a first electrode of a boost capacitor, a second gate insulating layer, a first interlayer insulating layer, an oxide semiconductor including a channel, a first electrode, and a second electrode of a second transistor, a channel, a first electrode, and a second electrode of a third transistor, and a second electrode of a boost capacitor, a third gate insulating layer disposed on the oxide semiconductor, a gate electrode of the second transistor overlapping the channel of the second transistor, a gate electrode of the third transistor overlapping the channel of the third transistor, and a second interlayer insulating layer disposed on the gate electrode of the second transistor and the gate electrode of the third transistor.
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公开(公告)号：US20240312998A1
公开(公告)日：2024-09-19
申请号：US18676363
申请日：2024-05-28
发明人： Jung Yub SEO , Tetsuhiro TANAKA , Hee Won YOON , Shin Beom CHOI
IPC分类号： H01L27/12 , H01L29/786 , H10K50/80 , H10K59/121 , H10K59/122 , H10K59/123 , H10K59/124 , H10K59/131
CPC分类号： H01L27/1222 , H01L27/1214 , H01L27/1225 , H01L27/1237 , H01L27/1255 , H01L27/1274 , H01L29/78606 , H01L29/7869 , H10K50/80 , H10K59/1213 , H10K59/1216 , H10K59/122 , H10K59/123 , H10K59/124 , H10K59/1315
摘要： A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.
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公开(公告)号：US20220005901A1
公开(公告)日：2022-01-06
申请号：US17348179
申请日：2021-06-15
发明人： Tetsuhiro TANAKA , Jung Yub SEO , Ki Seong SEO , Yeong Gyu KIM , Hee Won YOON
IPC分类号： H01L27/32 , H01L29/786
摘要： A display device comprises a base substrate, a lower interlayer dielectric layer, an oxide semiconductor layer including a first channel region, a first drain region disposed on one side of the first channel region, and a first source region, a first gate insulating layer, a first upper gate electrode, an upper interlayer dielectric layer, and a first source electrode and a first drain electrode, wherein the lower interlayer dielectric layer includes a first lower interlayer dielectric layer disposed on the base substrate, and a second lower interlayer dielectric layer disposed on the first lower interlayer dielectric layer, wherein the first lower interlayer dielectric layer includes silicon nitride and the second lower interlayer dielectric layer comprises silicon oxide, and wherein a composition ratio of nitrogen to silicon in the first lower interlayer dielectric layer ranges from 0.8 to 0.89.
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