Abstract:
A display device includes a first pixel, a second pixel, and a third pixel, bank patterns disposed on a substrate, light-emitting elements disposed between the bank patterns, color conversion layers disposed on the light-emitting elements between the bank patterns, and protective layers disposed on the color conversion layers, wherein the protective layers in the first pixel, the second pixel, and the third pixel have different thicknesses.
Abstract:
A display device includes pixels that are arranged in a display area in a first direction and a second direction and that include first electrodes separated from each other and light emitting elements electrically connected to the first electrodes; second electrodes that are arranged separately from each other in the first direction and are electrically connected to the light emitting elements of the pixels arranged in the second direction; a first pad part including a first pad electrically connected to the first electrodes; and a second pad part including second pads electrically connected to different second electrodes among the second electrodes.
Abstract:
A display device includes a first electrode disposed on a substrate. A light blocking layer is disposed on the substrate, the light blocking layer includes a recessed portion recessed toward the first electrode. Holes exposing the first electrode are formed in the recessed portion of the light blocking layer. Light emitting elements are disposed in the holes, each of the light emitting elements including a first end electrically contacting the first electrode. A second electrode is disposed on the light blocking layer, the second electrode electrically contacts a second end of each of the light emitting elements. A light conversion pattern is disposed in the recessed portion of the light blocking layer.
Abstract:
A display device includes: a plurality of light emitting elements on a first substrate; a second substrate facing the first substrate; a partition wall on one surface of the second substrate facing the first substrate, and including a plurality of openings; a plurality of color filters in the plurality of openings; wavelength conversion layers on the plurality of color filters, respectively, and to convert wavelengths of light emitted from the plurality of light emitting elements; and an adhesive layer adhering the first substrate and the second substrate to each other. The partition wall includes a silicon single crystal.
Abstract:
A thin film transistor array panel and method of manufacturing. The thin film transistor array panel includes a substrate, a first gate electrode positioned on the substrate, a gate insulating layer positioned on the first gate, an oxide semiconductor positioned on the gate insulating layer and including a channel region, at least one etch stopper positioned on the oxide semiconductor, a second gate electrode, a source electrode and a drain electrode positioned on the at least one etch stopper, a passivation layer formed on the second gate electrode, the source electrode and the drain electrode; and a pixel electrode positioned on the passivation layer and connected to the drain electrode, in which the oxide semiconductor includes an N+ region formed in a portion exposed through the at least one etch stopper.
Abstract:
Provided is a display device. A display device includes a display area and a buffer area disposed around the display area, a pixel electrode disposed on a substrate and in the display area, a bank covering an edge of the pixel electrode, light emitting elements disposed on the pixel electrode and extending in a thickness direction of the substrate, and a buffer disposed on the substrate and in the buffer area. The bank and the buffer are disposed on a same layer.
Abstract:
A display device comprises a substrate including a plurality of light emitting areas, a partition wall portion provided on the substrate and partitioning the plurality of light emitting areas, and a plurality of light emitting parts provided on the substrate and respectively corresponding to the plurality of light emitting areas, wherein at least one of the plurality of light emitting parts includes a light emitting element provided on the substrate, and a first color conversion layer covering the light emitting element and including first inorganic particles, and the first inorganic particles include Nd2(Si, Ti, Ge)2O7.
Abstract:
The display device includes a substrate, a thin-film transistor on the substrate and including a first electrode, a second electrode and a semiconductor layer, a first insulating layer on the thin-film transistor, an organic layer on the first insulating layer, at least one light-emitting element on the organic layer, a pixel electrode on the organic layer and in contact with a side surface of the at least one light-emitting element, a planarization layer on the side surface of the at least one light-emitting element and a common electrode on the at least one light-emitting element and the planarization layer.
Abstract:
A display device includes a first electrode is disposed on a substrate, a pixel defining layer disposed on the substrate in a non-emission area and defining an emission area, a reflection pattern protrudes upward from the first electrode in the emission area and forming a concave part on the first electrode, a light emitting element disposed in the concave part and electrically connected to the first electrode, and a second electrode disposed on the light emitting element and electrically connected to the light emitting element. The reflection pattern does not overlap the pixel defining layer in a plan view.
Abstract:
A display device includes a first thin film transistor disposed on a substrate. A first insulating interlayer covers lire first thin film transistor. An active pattern is disposed on the first insulating interlayer. The active pattern includes indium-gallium-zinc oxide (IGZO) having a thickness in a range of about 150 Å to about 400 Å. A gate insulation layer covers the active pattern A gate pattern is disposed on the gate insulation layer. A second insulating interlayer covers the gate pattern.