-
公开(公告)号:US20220386473A1
公开(公告)日:2022-12-01
申请号:US17683604
申请日:2022-03-01
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Chan Jin Park , Jong Eun Park , Hyun Seok Yang , Sangik Cho , Hiroki Okada , Young Ook Cho , Mi Jeong Jeon , In Jae Chung
Abstract: A method of manufacturing a printed circuit board includes: forming a resist layer; exposing first areas of the resist layer spaced apart from each other; after exposing the first areas, exposing second areas of the resist layer, the second areas being spaces between the first areas; forming first and second openings spaced apart from each other in the first and second areas by developing the resist layer; and forming a plurality of conductor patterns by filling the first and second openings with conductors.
-
公开(公告)号:US20210320416A1
公开(公告)日:2021-10-14
申请号:US16905324
申请日:2020-06-18
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sangik Cho , Ju Ho Kim
Abstract: An antenna includes a first dielectric layer having a first surface and a second surface opposing the first surface; a second dielectric layer having a third surface, and a fourth surface opposing the third surface; a third dielectric layer having a fifth surface and a sixth surface opposing the fifth surface; a first adhesive layer disposed between the second surface and the third surface; a second adhesive layer disposed between the fourth surface and the fifth surface; a patch pattern disposed on the second surface and embedded in the first adhesive layer; a first coupling pattern disposed on the fourth surface and embedded in the second adhesive layer, and a second coupling pattern disposed on the sixth surface. The patch pattern, the first coupling pattern, and the second coupling pattern at least partially overlap one another on a plane.
-
公开(公告)号:US11569586B2
公开(公告)日:2023-01-31
申请号:US16919609
申请日:2020-07-02
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sangik Cho , Ju Ho Kim
Abstract: A antenna may include a first dielectric layer having a first surface and a second surface opposing the first surface; a second dielectric layer having a third surface, and a fourth surface opposing the third surface; an adhesive layer disposed between the second surface and the third surface and connecting the first dielectric layer to the second dielectric layer; a patch pattern disposed on the second surface and embedded in the adhesive layer; and a coupling pattern disposed on the fourth surface and having at least a portion overlapping the patch pattern on a plane. Each of the first dielectric layer and the second dielectric layer may include an organic binder and an inorganic filler.
-
公开(公告)号:US11283174B2
公开(公告)日:2022-03-22
申请号:US16905324
申请日:2020-06-18
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sangik Cho , Ju Ho Kim
Abstract: An antenna includes a first dielectric layer having a first surface and a second surface opposing the first surface; a second dielectric layer having a third surface, and a fourth surface opposing the third surface; a third dielectric layer having a fifth surface and a sixth surface opposing the fifth surface; a first adhesive layer disposed between the second surface and the third surface; a second adhesive layer disposed between the fourth surface and the fifth surface; a patch pattern disposed on the second surface and embedded in the first adhesive layer; a first coupling pattern disposed on the fourth surface and embedded in the second adhesive layer, and a second coupling pattern disposed on the sixth surface. The patch pattern, the first coupling pattern, and the second coupling pattern at least partially overlap one another on a plane.
-
公开(公告)号:US12016130B2
公开(公告)日:2024-06-18
申请号:US17683604
申请日:2022-03-01
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Chan Jin Park , Jong Eun Park , Hyun Seok Yang , Sangik Cho , Hiroki Okada , Young Ook Cho , Mi Jeong Jeon , In Jae Chung
CPC classification number: H05K3/188 , C25D5/022 , C25D7/00 , G03F7/20 , H05K2203/025
Abstract: A method of manufacturing a printed circuit board includes: forming a resist layer; exposing first areas of the resist layer spaced apart from each other; after exposing the first areas, exposing second areas of the resist layer, the second areas being spaces between the first areas; forming first and second openings spaced apart from each other in the first and second areas by developing the resist layer; and forming a plurality of conductor patterns by filling the first and second openings with conductors.
-
公开(公告)号:US11558959B2
公开(公告)日:2023-01-17
申请号:US17230437
申请日:2021-04-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Jin Uk Lee , Sangik Cho , Eun Sun Kim , Young Hun You , Jong Eun Park
Abstract: A printed circuit board includes an insulating layer, a circuit pattern embedded in the insulating layer and including a first metal layer, a second metal layer and a third metal layer disposed between the first metal layer and the second metal layer, and a connection conductor disposed on one surface of the insulating layer and connected to the circuit pattern, wherein the first metal layer is exposed through the one surface of the insulating layer.
-
公开(公告)号:US20220217843A1
公开(公告)日:2022-07-07
申请号:US17230437
申请日:2021-04-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Jin Uk Lee , Sangik Cho , Eun Sun Kim , Young Hun You , Jong Eun Park
Abstract: A printed circuit board includes an insulating layer, a circuit pattern embedded in the insulating layer and including a first metal layer, a second metal layer and a third metal layer disposed between the first metal layer and the second metal layer, and a connection conductor disposed on one surface of the insulating layer and connected to the circuit pattern, wherein the first metal layer is exposed through the one surface of the insulating layer.
-
公开(公告)号:US20240395463A1
公开(公告)日:2024-11-28
申请号:US18513984
申请日:2023-11-20
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Sung Han , Sunghoon Kim , Mi-Geum Kim , Sangik Cho , Hoseung Jang , Kipyo Hong
Abstract: A multilayer ceramic capacitor may include a ceramic body, a plurality of first internal electrodes and a plurality of second internal electrodes disposed inside the ceramic body, a first external electrode disposed outside the ceramic body and connected to the plurality of first internal electrodes, and a second external electrode disposed outside the ceramic body and connected to the plurality of second internal electrodes, where the first external electrode may include, a first conductive carbon layer electrically connected to the plurality of first internal electrodes, and a first plated layer covering the first conductive carbon layer, and where the second external electrode may include, a second conductive carbon layer electrically connected to the plurality of second internal electrodes, and a second plated layer covering the second conductive carbon layer.
-
公开(公告)号:US20240298411A1
公开(公告)日:2024-09-05
申请号:US18661939
申请日:2024-05-13
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Chan Jin Park , Jong Eun Park , Hyun Seok Yang , Sangik Cho , Hiroki Okada , Young Ook Cho , Mi Jeong Jeon , In Jae Chung
CPC classification number: H05K3/188 , C25D5/022 , C25D7/00 , G03F7/20 , H05K2203/025
Abstract: A method of manufacturing a printed circuit board includes: forming a resist layer; exposing first areas of the resist layer spaced apart from each other; after exposing the first areas, exposing second areas of the resist layer, the second areas being spaces between the first areas; forming first and second openings spaced apart from each other in the first and second areas by developing the resist layer; and forming a plurality of conductor patterns by filling the first and second openings with conductors.
-
公开(公告)号:US20220322525A1
公开(公告)日:2022-10-06
申请号:US17469147
申请日:2021-09-08
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Jin Uk Lee , Sangik Cho , Chi Won Hwang , Eun Sun Kim
Abstract: A printed circuit board includes a first insulating layer, a first conductor-pattern layer disposed on one surface of the first insulating layer, a first recess formed in the other surface of the first insulating layer opposing one surface of the first insulating layer, a second conductor-pattern layer disposed in the first recess, and a first metal post penetrating the first insulating layer, connecting the first and second conductor-pattern layers to each other, and having one end exposed to a bottom surface of the first recess, wherein the second conductor-pattern layer includes a seed layer disposed on at least a portion of each of a surface of one end of the first metal post exposed to the bottom surface of the first recess and an internal surface of the first recess including the bottom surface of the first recess, and a plating layer disposed on the seed layer to fill at least a portion of the first recess.
-
-
-
-
-
-
-
-
-