公开(公告)号：US20230411354A1

公开(公告)日：2023-12-21

申请号：US18096859

申请日：2023-01-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chihong SHIN ,  Raehyung DO

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L24/48 ,  H01L24/49 ,  H01L24/06 ,  H01L23/49838 ,  H01L23/3121 ,  H01L2225/06562 ,  H01L2225/0651 ,  H01L2225/06506 ,  H01L2224/48227 ,  H01L2224/48145 ,  H01L2224/49175 ,  H01L2224/49096 ,  H01L2224/49051 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/4903 ,  H01L2224/04042 ,  H01L2224/06135

Abstract: A semiconductor package includes a package substrate having substrate pads disposed in a first direction on one surface, a semiconductor chip having chip pads disposed in the first direction, and bonding wires connecting the chip pads and the substrate pads. The bonding wires include first and second bonding wires alternately connected to the substrate pads respectively, in the first direction, the first bonding wires are connected to the substrate pads at a first angle less than a right angle with respect to a direction of the semiconductor chip, the second bonding wires are connected to the substrate pads at a second angle less than the first angle with respect to the direction of the semiconductor chip and a position at which the first bonding wires contact the substrate pads is closer to the semiconductor chip than a position at which the second bonding wires contact the substrate pads is to the semiconductor chip.