公开(公告)号：US20250040206A1

公开(公告)日：2025-01-30

申请号：US18583500

申请日：2024-02-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dahye Kim ,  Jinchan Yun ,  Daihong Huh ,  Jaehyun Park

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device is described. The device includes lower and upper channel layers over an active region on a substrate. The device further includes a middle insulating structure disposed between the lower and the upper channels. The device includes gate structures surrounding the channel layers, lower and upper source/drain regions disposed on the active region on at least one side of the gate structures. Between the lower and upper source/drain regions is a barrier structure. The lower and upper source/drain regions may each fill a lower recess region or an upper recess region, respectively. These recess regions are defined by the respective channel layers, the gate structures, and by the barrier structure. The side surface slopes within the upper and the lower recess regions may vary and the side surface slopes of each of the recess regions may be different from each other.

公开(公告)号：US20250151388A1

公开(公告)日：2025-05-08

申请号：US18738621

申请日：2024-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dahye Kim ,  Jae Hyun Park ,  Jinchan Yun ,  Daihong Huh

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device incudes: a plurality of lower channel patterns apart from each other; a plurality of upper channel patterns spaced apart from each other on the plurality of lower channel patterns; a gate structure surrounding the plurality of lower channel patterns and the plurality of upper channel patterns; a lower source/drain trench positioned on at least one side of the plurality of lower channel patterns; an upper source/drain trench positioned on at least one side of the plurality of upper channel patterns; a lower source/drain pattern positioned within the lower source/drain trench; and an upper source/drain pattern including first upper source/drain layers positioned on opposite sidewalls of the upper source/drain trench, and a second upper source/drain layer positioned between the first upper source/drain layers, in which the first upper source/drain layer does not cover at least a portion of the bottom surface of the upper source/drain trench.