公开(公告)号：US20220328483A1

公开(公告)日：2022-10-13

申请号：US17844435

申请日：2022-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20180175035A1

公开(公告)日：2018-06-21

申请号：US15830981

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/0924 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823807 ,  H01L21/82385 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/20 ,  H01L29/413 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/7853 ,  H01L29/78696 ,  H01L2924/13086

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US20230238383A1

公开(公告)日：2023-07-27

申请号：US18130010

申请日：2023-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L21/82385 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/413 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/775 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/78696 ,  H01L29/0646 ,  H01L29/42392

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20210028173A1

公开(公告)日：2021-01-28

申请号：US17037807

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.