公开(公告)号：US20200006333A1

公开(公告)日：2020-01-02

申请号：US16354505

申请日：2019-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANG-WOO NOH ,  JAE-HYEOUNG MA ,  DONG-IL BAE

IPC: H01L27/088 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78 ,  H01L21/308 ,  H01L21/8234 ,  H01L21/02 ,  H01L29/10

Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.

公开(公告)号：US20220328483A1

公开(公告)日：2022-10-13

申请号：US17844435

申请日：2022-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20210167064A1

公开(公告)日：2021-06-03

申请号：US17173546

申请日：2021-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHANG-WOO NOH ,  JAE-HYEOUNG MA ,  DONG-IL BAE

IPC: H01L27/088 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/308

Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.

公开(公告)号：US20230238383A1

公开(公告)日：2023-07-27

申请号：US18130010

申请日：2023-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L21/82385 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/413 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/775 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/78696 ,  H01L29/0646 ,  H01L29/42392

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20210028173A1

公开(公告)日：2021-01-28

申请号：US17037807

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20160315017A1

公开(公告)日：2016-10-27

申请号：US15199502

申请日：2016-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONG-IL BAE ,  KANG-ILL SEO

IPC: H01L21/8238 ,  H01L27/11 ,  H01L29/423 ,  H01L29/66 ,  H01L27/092 ,  H01L29/786

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696 ,  H01L2029/7858

Abstract: A semiconductor device includes a fin structure disposed on a substrate, a sacrificial layer pattern disposed on the fin structure, an active layer pattern disposed on the sacrificial layer pattern, and a gate dielectric layer and a gate electrode layer extending through the sacrificial layer pattern and surrounding a portion of the active layer pattern.

公开(公告)号：US20160276449A1

公开(公告)日：2016-09-22

申请号：US14662697

申请日：2015-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONG-IL BAE ,  Bomsoo KIM ,  Yong-Min CHO

IPC: H01L29/417 ,  H01L29/06 ,  H01L21/308 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L29/45

CPC classification number: H01L29/41791 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: An semiconductor device is provided. A fin is disposed on a substrate, extending in a lengthwise direction. A first recess is disposed on a sidewall of the fin so that the fin 7and the first recess is arranged in a straight line along the lengthwise direction. A gate structure crosses the fin in the first direction crossing the lengthwise direction. A spacer is disposed on sidewalk of the gate structure. A source/drain region is disposed in the first recess. The source/drain region is formed under the spacer. A silicide layer is disposed on the source/drain region. The silicide layer and the source/drain region fill the first recess.

Abstract translation: 提供半导体器件。 翅片设置在基板上，沿长度方向延伸。 第一凹部设置在翅片的侧壁上，使得翅片7和第一凹部沿着长度方向布置成直线。 栅极结构在与长度方向交叉的第一方向上跨越翅片。 间隔件设置在门结构的人行道上。 源极/漏极区域设置在第一凹部中。 源极/漏极区形成在间隔物下方。 硅化物层设置在源极/漏极区域上。 硅化物层和源/漏区填充第一凹槽。

公开(公告)号：US20180175035A1

公开(公告)日：2018-06-21

申请号：US15830981

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  GEUM-JONG BAE ,  DONG-IL BAE ,  SEUNG-MIN SONG ,  WOO-SEOK PARK

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/0924 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823807 ,  H01L21/82385 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/20 ,  H01L29/413 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/7853 ,  H01L29/78696 ,  H01L2924/13086

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US20180158819A1

公开(公告)日：2018-06-07

申请号：US15868616

申请日：2018-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONG-IL BAE ,  KANG-ILL SEO

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/161 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/3105 ,  H01L29/786 ,  H01L29/775 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423

Abstract: A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer pattern is disposed on the first fin structure. The first sacrificial layer pattern includes a left portion and a right portion arranged in the first direction. A dielectric layer pattern is disposed on the first fin structure and interposed between the left and right portions of the first sacrificial layer pattern. A first active layer pattern extending in the first direction is disposed on the first sacrificial layer pattern and the dielectric layer pattern. A first gate electrode structure is disposed on a portion of the first active layer pattern. The portion of the first active layer is disposed on the dielectric layer pattern. The first gate electrode structure extends in a second direction crossing the first direction.

公开(公告)号：US20170271330A1

公开(公告)日：2017-09-21

申请号：US15612416

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONG-IL BAE ,  KANG-ILL SEO

IPC: H01L27/088 ,  H01L29/161 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/3105

CPC classification number: H01L27/0886 ,  H01L21/31053 ,  H01L21/823431 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6681 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696

Abstract: A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer pattern is disposed on the first fin structure. The first sacrificial layer pattern includes a left portion and a right portion arranged in the first direction. A dielectric layer pattern is disposed on the first fin structure and interposed between the left and right portions of the first sacrificial layer pattern. A first active layer pattern extending in the first direction is disposed on the first sacrificial layer pattern and the dielectric layer pattern. A first gate electrode structure is disposed on a portion of the first active layer pattern. The portion of the first active layer is disposed on the dielectric layer pattern. The first gate electrode structure extends in a second direction crossing the first direction.