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公开(公告)号：US20220392899A1
公开(公告)日：2022-12-08
申请号：US17886878
申请日：2022-08-12
发明人： Yoon Tae HWANG , Sunjung LEE , Heonbok LEE , Geunwoo KIM , Wandon KIM
IPC分类号： H01L27/092 , H01L21/8238
摘要： A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.
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公开(公告)号：US20220069129A1
公开(公告)日：2022-03-03
申请号：US17321960
申请日：2021-05-17
发明人： Geunwoo KIM , Wandon KIM , Heonbok LEE , Yoontae HWANG
IPC分类号： H01L29/78 , H01L29/417
摘要： A semiconductor device includes: a fin-type active region extending on a substrate in a first direction; a gate structure extending across the fin-type active region in a second direction, different from the first direction; a source/drain region in the fin-type active region on one side of the gate structure; and first and second contact structures connected to the source/drain region and the gate structure, respectively, wherein at least one of the first and second contact structures includes a seeding layer on at least one of the gate structure and the source/drain region and including a first crystalline metal, and a contact plug on the seeding layer and including a second crystalline metal different from the first crystalline metal, and the second crystalline metal is substantially lattice-matched to the first crystalline metal at an interface between the seeding layer and the contact plug.
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公开(公告)号：US20230187335A1
公开(公告)日：2023-06-15
申请号：US18105955
申请日：2023-02-06
发明人： Donghee SEO , Heonbok LEE , Tae-Yeol KIM , Daeyong KIM , Dohyun LEE
IPC分类号： H01L23/498 , H01L29/78
CPC分类号： H01L23/49844 , H01L29/78 , H01L23/49811
摘要： A semiconductor device including an interlayer insulating layer on a substrate; a conductive line on the interlayer insulating layer; and a contact plug penetrating the interlayer insulating layer, the contact plug being connected to the conductive line, wherein the contact plug includes an upper pattern penetrating an upper region of the interlayer insulating layer, the upper pattern protruding upwardly from a top surface of the interlayer insulating layer, the upper pattern includes a first portion penetrating the upper region of the interlayer insulating layer; and a second portion protruding upwardly from the top surface of the interlayer insulating layer, and a width of a lower region of the second portion in a direction parallel to a top surface of the substrate is greater than a width of an upper region of the second portion in the direction parallel to the top surface of the substrate.
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公开(公告)号：US20230118906A1
公开(公告)日：2023-04-20
申请号：US18085871
申请日：2022-12-21
发明人： Yoontae HWANG , Wandon KIM , Geunwoo KIM , Heonbok LEE , Taegon KIM , Hanki LEE
IPC分类号： H01L29/45 , H01L29/78 , H01L29/66 , H01L29/417 , H01L21/285 , H01L29/08 , H01L23/532 , H01L23/485 , H01L23/522
摘要： A semiconductor device including a substrate; a fin active region on the substrate and extending in a first direction; a gate structure extending across the fin active region and extending in a second direction; a source/drain region in the fin active region on a side of the gate structure; an insulating structure covering the gate structure and the source/drain region; and contact structures penetrating through the insulating structure and respectively connected to the source/drain region and the gate structure, wherein one of the contact structures includes a seed layer on the gate structure or the source/drain regions and including lower and upper regions, the lower region having a first grain size and the upper region being amorphous or having a grain size different from the first grain size, and a contact plug on an upper region of the seed layer and having a second grain size.
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公开(公告)号：US20220069100A1
公开(公告)日：2022-03-03
申请号：US17231126
申请日：2021-04-15
发明人： Yoontae HWANG , Wandon KIM , Geunwoo KIM , Heonbok LEE , Taegon KIM , Hanki LEE
IPC分类号： H01L29/45 , H01L29/78 , H01L29/08 , H01L29/417 , H01L21/285 , H01L29/66
摘要： A semiconductor device including a substrate; a fin active region on the substrate and extending in a first direction; a gate structure extending across the fin active region and extending in a second direction; a source/drain region in the fin active region on a side of the gate structure; an insulating structure covering the gate structure and the source/drain region; and contact structures penetrating through the insulating structure and respectively connected to the source/drain region and the gate structure, wherein one of the contact structures includes a seed layer on the gate structure or the source/drain regions and including lower and upper regions, the lower region having a first grain size and the upper region being amorphous or having a grain size different from the first grain size, and a contact plug on an upper region of the seed layer and having a second grain size.
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公开(公告)号：US20210167004A1
公开(公告)日：2021-06-03
申请号：US16893540
申请日：2020-06-05
发明人： Donghee SEO , Heonbok LEE , Tae-Yeol KIM , Daeyong KIM , Dohyun LEE
IPC分类号： H01L23/498 , H01L29/78
摘要： A semiconductor device including an interlayer insulating layer on a substrate; a conductive line on the interlayer insulating layer; and a contact plug penetrating the interlayer insulating layer, the contact plug being connected to the conductive line, wherein the contact plug includes an upper pattern penetrating an upper region of the interlayer insulating layer, the upper pattern protruding upwardly from a top surface of the interlayer insulating layer, the upper pattern includes a first portion penetrating the upper region of the interlayer insulating layer; and a second portion protruding upwardly from the top surface of the interlayer insulating layer, and a width of a lower region of the second portion in a direction parallel to a top surface of the substrate is greater than a width of an upper region of the second portion in the direction parallel to the top surface of the substrate.
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公开(公告)号：US20210104524A1
公开(公告)日：2021-04-08
申请号：US16898719
申请日：2020-06-11
发明人： Yoon Tae HWANG , Sunjung LEE , Heonbok LEE , Geunwoo KIM , Wandon KIM
IPC分类号： H01L27/092 , H01L21/8238
摘要： A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types from each other; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.
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公开(公告)号：US20200381528A1
公开(公告)日：2020-12-03
申请号：US16998493
申请日：2020-08-20
发明人： Wonkeun CHUNG , Heonbok LEE , Chunghwan SHIN , Yongsuk CHAI , Sangjin HYUN
IPC分类号： H01L29/423 , H01L27/092 , H01L29/78 , H01L29/66 , H01L29/08
摘要： A semiconductor device includes a substrate having an active pattern therein, a gate electrode extending across the active pattern and a source/drain region on the active pattern laterally adjacent the gate electrode. The device further includes a contact structure including a first contact on the source/drain region, a second contact on the first contact and a spacer on sidewalls of the first and second contacts.
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