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    MULTI-CPU SYSTEM AND COMPUTING SYSTEM HAVING THE SAME
    1.
    发明申请
    MULTI-CPU SYSTEM AND COMPUTING SYSTEM HAVING THE SAME 审中-公开
    多CPU系统和计算机系统

    公开(公告)号：US20150143048A1

    公开(公告)日：2015-05-21

    申请号：US14604832

    申请日：2015-01-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hoi Jin Lee ,  Young Min Shin

    IPC: G06F12/08

    CPC classification number: G06F12/0811 ,  G06F1/3234 ,  G06F1/3275 ,  G06F12/0833 ,  G06F12/084 ,  G06F2212/1028 ,  G06F2212/283 ,  G06F2212/62 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

    Abstract: A multi-CPU data processing system, comprising: a multi-CPU processor, comprising: a first CPU configured with at least a first core, a first cache, and a first cache controller configured to access the first cache; and a second CPU configured with at least a second core, and a second cache controller configured to access a second cache, wherein the first cache is configured from a shared portion of the second cache.

    Abstract translation: 一种多CPU数据处理系统，包括：多CPU处理器，包括：第一CPU，配置有至少第一内核，第一高速缓存和配置为访问第一高速缓存的第一高速缓存控制器; 以及配置有至少第二核心的第二CPU和被配置为访问第二高速缓存的第二高速缓存控制器，其中所述第一高速缓存由所述第二高速缓存的共享部分配置。

    Layout design system and semiconductor device fabricated using the same
    2.
    发明授权
    Layout design system and semiconductor device fabricated using the same 有权

    公开(公告)号：US10540471B2

    公开(公告)日：2020-01-21

    申请号：US15590294

    申请日：2017-05-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyoung Kuk Chae ,  Hoi Jin Lee

    IPC: G06F17/50 ,  H01L27/02 ,  H01L27/088 ,  H01L29/78 ,  H01L27/11575

    Abstract: A semiconductor device is provided. A semiconductor device includes a filler cell including first and second insulating structures, the first and second insulating structures extending in a first direction, the filler cell being defined by first cell boundaries; and a neighboring cell including a third insulating structure, the third insulating structure extending in the first direction, the neighboring cell being adjacent to the filler cell in the first direction and defined by second cell boundaries, wherein the first and second insulating structures are spaced apart from one another in a second direction, is the second direction being perpendicular to the first direction.

    Semiconductor integrated circuit and method of operating the same
    4.
    发明授权
    Semiconductor integrated circuit and method of operating the same 有权
    半导体集成电路及其操作方法

    公开(公告)号：US08994432B2

    公开(公告)日：2015-03-31

    申请号：US13974763

    申请日：2013-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hoi Jin Lee

    IPC: H03K3/017 ,  G06F1/32

    CPC classification number: G06F1/324 ,  Y02D10/126

    Abstract: A semiconductor integrated circuit and a method operating the same are provided. The semiconductor integrated circuit includes a first clock network configured to divide a clock signal into first output clock signals with a high frequency, a second clock network configured to divide the clock signal into second output clock signals with a non-high frequency, a plurality of selection circuits configured to be connected between the first clock network and the second clock network, and configured to output one of the first output clock signals and the second output clock signals, according to a power mode, and a plurality of clock sinks configured to sink output clock signals respectively output from the selection circuits.

    Abstract translation: 提供半导体集成电路及其操作方法。 半导体集成电路包括：第一时钟网络，被配置为将时钟信号分成具有高频率的第一输出时钟信号;第二时钟网络，被配置为将时钟信号划分成具有非高频的第二输出时钟信号;多个 选择电路，其被配置为连接在所述第一时钟网络和所述第二时钟网络之间，并且被配置为根据功率模式输出所述第一输出时钟信号和所述第二输出时钟信号中的一个，以及被配置为接收的多个时钟信宿 分别从选择电路输出的输出时钟信号。

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