公开(公告)号：US20240113110A1

公开(公告)日：2024-04-04

申请号：US18199014

申请日：2023-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Hee CHO ,  Seokhyeon YOON ,  Hyeongrae KIM ,  Jeewoong SHIN

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L27/088 ,  H01L21/823412 ,  H01L21/823418 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

Abstract: A semiconductor device includes first and second active patterns on first and second PMOS regions, two first source/drain patterns spaced apart along a first direction on the first active pattern and a first channel pattern including first semiconductor patterns between the two first source/drain patterns, and two second source/drain patterns spaced apart along the first direction on the second active pattern and a second channel pattern including second semiconductor patterns between the two second source/drain patterns. A width in a second direction of the each of the first semiconductor patterns is greater than a width of each of the second semiconductor patterns. Each of the first and second source/drain patterns includes semiconductor layers having different germanium concentrations. A number of the semiconductor layers of each of the two second source/drain patterns is greater than a number of the semiconductor layers of each of the two first source/drain patterns.