公开(公告)号：US20170040208A1

公开(公告)日：2017-02-09

申请号：US15142043

申请日：2016-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-Hoon CHOI ,  Ho-Young KIM ,  Gi-Gwan PARK ,  Hyun-Kyung BAE ,  Bo-Un YOON ,  Il-Young YOON

IPC: H01L21/768

CPC classification number: H01L21/7684 ,  B24B37/042 ,  H01L21/67219 ,  H01L21/76819 ,  H01L21/76849 ,  H01L21/76897 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L29/41791

Abstract: A method of forming a plug and manufacturing a semiconductor device, a polishing chamber, and a semiconductor device, the method of forming a plug including forming an opening in an insulating interlayer pattern on a substrate; forming a metal layer to fill the opening; performing a first CMP process during a first time period until a top surface of the insulating interlayer pattern is exposed while pressing the substrate onto a first polishing pad to polish the metal layer; performing a second CMP process during a second time period while pressing the substrate onto a second polishing pad to polish the metal layer and the insulating interlayer pattern, so that a metal plug is formed in the insulating interlayer pattern; and performing a first cleaning process on the second polishing pad while keeping the substrate spaced apart from the second polishing pad on the second platen.

Abstract translation: 一种形成插头并制造半导体器件，抛光室和半导体器件的方法，包括在衬底上形成绝缘层间图案中的开口的形成插头的方法; 形成金属层以填充开口; 在第一时间段内执行第一CMP处理直到绝缘层间图案的顶表面暴露，同时将基板压在第一抛光垫上以抛光金属层; 在第二时间段内执行第二CMP处理，同时将衬底按压到第二抛光垫上以抛光金属层和绝缘层间图案，从而在绝缘层间图案中形成金属插塞; 以及在所述第二台板上保持与所述第二抛光垫间隔开的所述基板的同时对所述第二抛光垫进行第一清洁处理。