公开(公告)号：US20180294256A1

公开(公告)日：2018-10-11

申请号：US15842995

申请日：2017-12-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Inhak LEE ,  Sang-Yeop BAECK ,  JaeSeung CHOI ,  Hyunsu CHOI ,  SangShin HAN

IPC: H01L27/02 ,  H01L27/092 ,  H01L27/11 ,  H01L23/522 ,  H01L23/528 ,  H01L21/8238 ,  G06F17/50

CPC classification number: H01L27/0207 ,  G06F17/5081 ,  H01L21/823821 ,  H01L21/823871 ,  H01L23/5226 ,  H01L23/5286 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/7848

Abstract: A semiconductor device including memory cell transistors on a substrate is provided. The semiconductor device includes a first wiring layer on the memory cell transistors and including a bit line and a first conductive pattern, a second wiring layer on the first wiring layer and including a ground line, a first via interposed between and electrically connecting the bit line and a source/drain of a first memory cell transistor among the memory cell transistors, and a first extended via interposed between the ground line and a source/drain of a second memory cell transistor among the memory cell transistors. The ground line is electrically connected to the source/drain of the second memory cell transistor through the first extended via and the first conductive pattern. The first extended via has a width greater than that of the first via.

公开(公告)号：US20230186982A1

公开(公告)日：2023-06-15

申请号：US18164199

申请日：2023-02-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung Kang ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  G11C7/08 ,  H10B10/00 ,  H01L23/528 ,  H01L27/092

CPC classification number: G11C11/419 ,  G11C7/08 ,  H10B10/12 ,  H10B10/18 ,  H01L23/5286 ,  H01L27/092

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.

公开(公告)号：US20210383861A1

公开(公告)日：2021-12-09

申请号：US17412588

申请日：2021-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  G11C7/08 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.

公开(公告)号：US20200005860A1

公开(公告)日：2020-01-02

申请号：US16566002

申请日：2019-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.

公开(公告)号：US20170221554A1

公开(公告)日：2017-08-03

申请号：US15417807

申请日：2017-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop BAECK ,  Tae-Hyung KIM ,  Daeyoung MOON ,  Dong-Wook SEO ,  Inhak LEE ,  Hyunsu CHOI ,  Taejoong SONG ,  Jae-Seung CHOI ,  Jung-Myung KANG ,  Hoon KIM ,  Jisu YU ,  Sun-Yung JANG

IPC: G11C11/419 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.