公开(公告)号：US20210020509A1

公开(公告)日：2021-01-21

申请号：US17031279

申请日：2020-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Chan GWAK ,  Hwi Chan JUN ,  Heon Jong SHIN ,  So Ra YOU ,  Sang Hyun LEE ,  In Chan HWANG

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L29/417 ,  H01L29/66

Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.

公开(公告)号：US20200126858A1

公开(公告)日：2020-04-23

申请号：US16724483

申请日：2019-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Chan GWAK ,  Hwi Chan JUN ,  Heon Jong SHIN ,  So Ra YOU ,  Sang Hyun LEE ,  In Chan HWANG

IPC: H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L23/528 ,  H01L23/522

Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.

公开(公告)号：US20240120400A1

公开(公告)日：2024-04-11

申请号：US18376549

申请日：2023-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Hoon HWANG ,  In Chan HWANG ,  Hyo Jin KIM

IPC: H01L29/423 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/41775 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes first lower nanosheets; an upper isolation layer on the first lower nanosheets; first upper nanosheets on the upper isolation layer; a first upper source/drain region on the first upper nanosheets; a second upper source/drain region on the first upper nanosheets; a first gate electrode surrounding the first lower nanosheets, the upper isolation layer, and the first upper nanosheets; a first gate cut on a side of the first gate electrode and extending from a lower surface of the first gate electrode to an upper surface of the first gate electrode; a first through via inside the first gate cut and insulated from the first gate electrode; a first upper source/drain contact on and electrically connected to the first upper source/drain region; and a second upper source/drain contact on the first upper source/drain region and electrically connecting the second upper source/drain region with the first through via.