公开(公告)号：US20180047899A1

公开(公告)日：2018-02-15

申请号：US15432346

申请日：2017-02-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HIDEKI HORII ,  SEONG-GEON PARK ,  DONG-HO AHN ,  JUNG-MOO LEE

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1683 ,  H01L27/2427 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/065 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/144

Abstract: A variable resistance memory device includes first conductive lines positioned above a substrate. Each of the first conductive lines extends in a first direction and a second direction. Second conductive lines extend in the first direction and the second direction. The second conductive lines are positioned above the first conductive lines. A memory is positioned between the first and second conductive lines. The memory unit overlaps the first and second conductive lines in a third direction. The memory unit includes a first electrode, a variable resistance pattern positioned on the first electrode, and a second electrode positioned on the variable resistance pattern. A selection pattern is positioned on each memory unit. A third electrode is positioned above the selection pattern. The third electrode is in direct contact with a lower surface of each of the second conductive lines.

公开(公告)号：US20160148977A1

公开(公告)日：2016-05-26

申请号：US14980247

申请日：2015-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-WOO LEE ,  YOUN-SEON KANG ,  JUNG-MOO LEE ,  SEUNG-JAE JUNG ,  HYUN-SU JU

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L27/249 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/142 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1675

Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.

公开(公告)号：US20150129824A1

公开(公告)日：2015-05-14

申请号：US14323301

申请日：2014-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-WOO LEE ,  YOUN-SEON KANG ,  JUNG-MOO LEE ,  SEUNG-JAE JUNG ,  HYUN-SU JU

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L27/249 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/142 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1675

Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.

Abstract translation: 半导体器件包括衬底上的第一电极，选择器件图案，可变电阻层图案，第一保护层图案，第二保护层图案和第二电极。 选择装置图案在给定方向上比可变电阻层图案更宽。 第一保护层图案形成在可变电阻层图案的第一对相对侧上。 第二保护层图案形成在可变电阻层图案的第二对相对的第二保护层图案上。 第二电极设置在可变电阻层图案上。