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Patent Agency Ranking
公开(公告)号：US20150356932A1
公开(公告)日：2015-12-10
申请号：US14614469
申请日：2015-02-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JIN-WOO KIM , CHANG-SIG KANG , YONG-JOO KIM , CHANG-SIN KIM , JIN-WOO LEE
IPC: G09G3/36
CPC classification number: G09G3/3688 , G09G2310/027 , G09G2320/0285
Abstract: A liquid crystal display (LCD) device includes a display including a plurality of pixels, a voltage compensation controller configured to control the plurality of pixels and determine whether to compensate a predetermined grayscale voltage to be applied to the plurality of pixels, and a voltage generator configured to provide the predetermined grayscale voltage to the plurality of pixels in response to the voltage compensation controller determining not to compensate the predetermined grayscale voltage, and to compensate the predetermined grayscale voltage and provide the compensated predetermined grayscale voltage to the plurality of pixels in response to the voltage compensation controller determining to compensate the predetermined grayscale voltage.
Abstract translation: 液晶显示器（LCD）装置包括包括多个像素的显示器，电压补偿控制器，被配置为控制多个像素并确定是否补偿要施加到多个像素的预定灰度电压;以及电压发生器 被配置为响应于所述电压补偿控制器确定不补偿所述预定灰度级电压而向所述多个像素提供所述预定灰度级电压，并且为了补偿所述预定灰度级电压并响应于所述多个像素向所述多个像素提供补偿的预定灰度电压 电压补偿控制器确定补偿预定的灰度电压。
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公开(公告)号：US20180145252A1
公开(公告)日：2018-05-24
申请号：US15862926
申请日：2018-01-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JI-HYUN JEONG , JIN-WOO LEE , GWAN-HYEOB KOH , DAE-HWAN KANG
CPC classification number: H01L45/144 , H01L27/2427 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/141 , H01L45/16 , H01L45/1675 , H01L45/1683
Abstract: Provided are a memory device and a method of manufacturing the same. Memory cells of the memory device are formed separately from first electrode lines and second electrode lines, wherein the second electrode lines over the memory cells are formed by a damascene process, thereby avoiding complications associated with CMP being excessively or insufficiently performed on an insulation layer over the memory cells.
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公开(公告)号：US20200152869A1
公开(公告)日：2020-05-14
申请号：US16743594
申请日：2020-01-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JI-HYUN JEONG , JIN-WOO LEE , GWAN-HYEOB KOH , DAE-HWAN KANG
Abstract: Provided are a memory device and a method of manufacturing the same. Memory cells of the memory device are formed separately from first electrode lines and second electrode lines, wherein the second electrode lines over the memory cells are formed by a damascene process, thereby avoiding complications associated with CMP being excessively or insufficiently performed on an insulation layer over the memory cells.
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公开(公告)号：US20160148977A1
公开(公告)日：2016-05-26
申请号：US14980247
申请日：2015-12-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JIN-WOO LEE , YOUN-SEON KANG , JUNG-MOO LEE , SEUNG-JAE JUNG , HYUN-SU JU
CPC classification number: H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L27/249 , H01L45/04 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/1616 , H01L45/1675
Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
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公开(公告)号：US20150129824A1
公开(公告)日：2015-05-14
申请号：US14323301
申请日：2014-07-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JIN-WOO LEE , YOUN-SEON KANG , JUNG-MOO LEE , SEUNG-JAE JUNG , HYUN-SU JU
CPC classification number: H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L27/249 , H01L45/04 , H01L45/085 , H01L45/1226 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/1616 , H01L45/1675
Abstract: A semiconductor device includes a first electrode on a substrate, a selection device pattern, a variable resistance layer pattern, a first protective layer pattern, a second protective layer pattern and a second electrode. The selection device pattern is wider, in a given direction, than the variable resistance layer pattern. The first protective layer pattern is formed on a first pair of opposite sides of the variable resistance layer pattern. The second protective layer pattern is formed on a second pair of opposite of the variable resistance layer pattern. The second electrode is disposed on the variable resistance layer pattern.
Abstract translation: 半导体器件包括衬底上的第一电极，选择器件图案，可变电阻层图案，第一保护层图案，第二保护层图案和第二电极。 选择装置图案在给定方向上比可变电阻层图案更宽。 第一保护层图案形成在可变电阻层图案的第一对相对侧上。 第二保护层图案形成在可变电阻层图案的第二对相对的第二保护层图案上。 第二电极设置在可变电阻层图案上。
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