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公开(公告)号:US20220013474A1
公开(公告)日:2022-01-13
申请号:US17083932
申请日:2020-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaekyung YOO , Yeongkwon KO , Jayeon LEE , Jaeeun LEE , Teakhoon LEE
IPC: H01L23/00 , H01L25/065 , H01L25/18 , H01L23/31 , H01L23/498 , H01L21/48 , H01L21/56 , H01L25/00
Abstract: A semiconductor package comprises a substrate; an interposer on the substrate; a first underfill between the substrate and the interposer; at least one logic chip and at least one memory stack on the interposer; and a molding material on the interposer while surrounding a side surface of the at least one logic chip and a side surface of the at least one memory stack. The molding material includes areas having different heights. The first underfill covers a portion of the molding material.
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公开(公告)号:US20220059446A1
公开(公告)日:2022-02-24
申请号:US17224906
申请日:2021-04-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyoseok WOO , Hyunsook YOON , Jaeeun LEE , Junseok KIM
IPC: H01L23/528 , H01L23/522
Abstract: A semiconductor device includes a first metal wiring pattern area, and a second metal wiring pattern area that does not overlap the first metal wiring pattern area in a plan view. The first metal wiring pattern area includes a first pattern, the second metal wiring pattern area includes a second pattern that is spaced apart from the first pattern and includes one or more lines. The first metal wiring pattern area includes an assist pattern comprising one or more lines. The assist pattern is spaced apart from the second pattern, parallel with the second pattern, and is between the first pattern and the second pattern. One end of the assist pattern is connected to the first pattern.
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公开(公告)号:US20230146621A1
公开(公告)日:2023-05-11
申请号:US18049901
申请日:2022-10-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaekyung YOO , Jinwoo PARK , Jayeon LEE , Jaeeun LEE
CPC classification number: H01L25/18 , H01L23/3128 , H01L24/32 , H01L24/16 , H01L24/73 , H01L23/293 , H01L23/481 , H01L2224/32225 , H01L2224/16227 , H01L2224/73204 , H01L2224/2929 , H01L24/29 , H01L2224/29386
Abstract: A semiconductor device includes a plurality of semiconductor chips sequentially stacked on a substrate, an underfill layer between the plurality of semiconductor chips and between the substrate and a lowermost one of the plurality of semiconductor chips, and a molding resin extending around the plurality of semiconductor chips. The molding resin extends to a space between an uppermost one of the plurality of semiconductor chips and a semiconductor chip sequentially beneath the uppermost one of the plurality of semiconductor chips.
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