公开(公告)号：US09799411B2

公开(公告)日：2017-10-24

申请号：US14705745

申请日：2015-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Cheol Hong ,  Young-Jin Cho ,  Dong-Gi Lee ,  Hee-Chang Cho

IPC: G11C17/00 ,  G11C29/52 ,  G06F13/16 ,  G11C5/04

CPC classification number: G11C29/52 ,  G06F13/1684 ,  G11C5/04

Abstract: A memory module set includes a main integrated circuit (IC) for transmitting and receiving an electrical signal, a first group of memory modules including at least one memory module having a first pin unit connected to the main IC, and a second group of memory modules including at least one memory module having a second pin unit connected to the main IC. The groups of memory modules and the main IC are arrayed in a first direction on a substrate, and the second group of memory modules is offset with respect to the first group of memory modules in a second direction that is perpendicular to the first direction so as to have a position relative to the main IC in the second direction that is different from that of the first group of memory modules.