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    Method of erasing data in nonvolatile memory device, nonvolatile memory device performing the same and memory system including the same
    4.
    发明授权
    Method of erasing data in nonvolatile memory device, nonvolatile memory device performing the same and memory system including the same 有权

    公开(公告)号：US11056194B2

    公开(公告)日：2021-07-06

    申请号：US17036387

    申请日：2020-09-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Won-Bo Shim ,  Sang-Wan Nam ,  Ji-Ho Cho

    IPC: G11C16/16 ,  G11C16/26 ,  G11C16/30 ,  G11C7/10 ,  G11C16/04 ,  G11C8/14

    Abstract: A nonvolatile memory device includes a memory cell region, a peripheral circuit region, a memory block in the memory cell region, a row decoder in the peripheral circuit region, and a control circuit in the peripheral circuit region. The memory cell region includes a first metal pad. The peripheral circuit region includes a second metal pad and is vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory block includes memory cells stacked in a direction intersecting a substrate, and is divided into a plurality of sub-blocks configured to be erased independently. The row decoder selects the memory block by units of a sub-block. The control circuit receives a data erase command for a selected sub-block among the plurality of sub-blocks, performs a data read operation on at least one victim sub-block among the plurality of sub-blocks in response to the data erase command, selectively performs a soft program operation on the at least one victim sub-block based on a result of the data read operation, and performs a data erase operation on the selected sub-block after the data read operation is performed and the soft program operation is selectively performed.

    METHOD OF ERASING DATA IN NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY DEVICE PERFORMING THE SAME AND MEMORY SYSTEM INCLUDING THE SAME
    6.
    发明申请
    METHOD OF ERASING DATA IN NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY DEVICE PERFORMING THE SAME AND MEMORY SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20210012840A1

    公开(公告)日：2021-01-14

    申请号：US17036387

    申请日：2020-09-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Won-Bo Shim ,  Sang-Wan Nam ,  Ji-Ho Cho

    IPC: G11C16/16 ,  G11C16/26 ,  G11C16/30 ,  G11C7/10 ,  G11C16/04

    Abstract: A nonvolatile memory device includes a memory cell region, a peripheral circuit region, a memory block in the memory cell region, a row decoder in the peripheral circuit region, and a control circuit in the peripheral circuit region. The memory cell region includes a first metal pad. The peripheral circuit region includes a second metal pad and is vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory block includes memory cells stacked in a direction intersecting a substrate, and is divided into a plurality of sub-blocks configured to be erased independently. The row decoder selects the memory block by units of a sub-block. The control circuit receives a data erase command for a selected sub-block among the plurality of sub-blocks, performs a data read operation on at least one victim sub-block among the plurality of sub-blocks in response to the data erase command, selectively performs a soft program operation on the at least one victim sub-block based on a result of the data read operation, and performs a data erase operation on the selected sub-block after the data read operation is performed and the soft program operation is selectively performed.

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