公开(公告)号：US20230046335A1

公开(公告)日：2023-02-16

申请号：US17879511

申请日：2022-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Soo KIM ,  Jaehoon SHIM ,  Carl DUFFY

IPC: G06F16/22 ,  G06F16/901

Abstract: A host, a storage system, and an operating method of the host are provided. The host includes a host memory configured to store a tree structure including a leaf node and an index node, an index management module configured to manage an index based on the tree structure and generate a first log corresponding to the leaf node based on a first update request corresponding to a first key-value entry included in the leaf node, and a device driver configured to generate a first write command corresponding to the first log and transmit the generated first write command to a key-value storage device, so as to store the first log in the key-value storage device. The index management module is configured to generate a first new key-value entry, the first new-key value entry including a first value updated based on the first update request, as the first log.

公开(公告)号：US20170047001A1

公开(公告)日：2017-02-16

申请号：US15235576

申请日：2016-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ha Joon SHIN ,  Jin-Soo KIM ,  Seung Hwan BAEK ,  Kyung-Gyu PARK ,  Ji-Yong JEONG

IPC: G09G3/20

CPC classification number: G09G3/3688 ,  G06F3/1446 ,  G09G3/3275 ,  G09G2230/00 ,  G09G2300/026 ,  G09G2310/0291 ,  G09G2310/08

Abstract: A source driver integrated circuit (IC) for driving a flat panel display is provided. The source driver IC includes a first control logic circuit configured to generate first output signals for driving first source lines arranged in a first region of the flat panel display and a second control logic circuit configured to generate second output signals for driving second source lines arranged in a second region of the flat panel display. A first output delay between two adjacent output signals among the first output signals is different from a second output delay between two adjacent output signals among the second output signals.

Abstract translation: 提供用于驱动平板显示器的源极驱动器集成电路（IC）。 源极驱动器IC包括第一控制逻辑电路，其被配置为产生用于驱动布置在平板显示器的第一区域中的第一源极线的第一输出信号;以及第二控制逻辑电路，其被配置为产生用于驱动第二源极线布置的第二输出信号 平板显示器的第二区域。 第一输出信号中的两个相邻输出信号之间的第一输出延迟与第二输出信号中的两个相邻输出信号之间的第二输出延迟不同。

公开(公告)号：US20160072446A1

公开(公告)日：2016-03-10

申请号：US14798675

申请日：2015-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Yong JEONG ,  Jin-Soo KIM ,  Seung-Hwan BAEK ,  Ha-Joon SHIN

IPC: H03F1/02 ,  H03F3/45 ,  H03F1/34

CPC classification number: H03F3/303 ,  G09G2310/0291 ,  G09G2320/0252 ,  G09G2330/021 ,  H03F3/45219 ,  H03F2203/30015 ,  H03F2203/30021 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03F2203/45244 ,  H03F2203/45274 ,  H03F2203/45512

Abstract: An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit.

Abstract translation: 提供了一种运算放大电路。 运算放大电路包括控制电路，上拉和下拉晶体管，第一和第二偏置电路以及偏置电压产生电路。 控制电路包括第一和第二输入端，并且被配置为当输入电压转变到第一电平时，将上拉节点和下拉节点的电压电平改变到与第一电平不同的第二电平 。 上拉晶体管向输出端提供电源电压。 下拉晶体管将输出端子连接到接地电压。 第一偏置电路向控制电路提供第一偏置电流。 当所述上拉和下拉节点中的至少一个的电压电平达到阈值电压电平时，所述偏置电压产生电路产生偏置电压，并且所述第二偏置电路向所述控制电路提供第二偏置电流。