公开(公告)号：US20240290007A1

公开(公告)日：2024-08-29

申请号：US18466143

申请日：2023-09-13

Applicant: Samsung Electronics Co., Ltd. ,  POSTECH Research and Business Development Foundation

Inventor： Donghoon SAGONG ,  Haechan LEE ,  Sunghyun CHO ,  Seung-Hwan BAEK ,  Nahyup KANG ,  Jiyeon KIM

IPC: G06T11/00 ,  G06T7/90 ,  G06T15/20 ,  G06T17/10

CPC classification number: G06T11/001 ,  G06T7/90 ,  G06T15/205 ,  G06T17/10 ,  G06T2207/10012 ,  G06T2207/10024 ,  G06T2207/20084

Abstract: A processor-implemented method includes: extracting pyramid level color feature maps from two or more images; extracting pyramid level density feature maps based on a cost volume generated based on the color feature maps; generating neural scene representation (NSR) cube information representing a three-dimensional (3D) space based on the color feature maps and the density feature maps; and generating a two-dimensional (2D) scene of a field of view (FOV) different from a FOV of the two or more images based on the NSR cube information.

公开(公告)号：US20160072446A1

公开(公告)日：2016-03-10

申请号：US14798675

申请日：2015-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Yong JEONG ,  Jin-Soo KIM ,  Seung-Hwan BAEK ,  Ha-Joon SHIN

IPC: H03F1/02 ,  H03F3/45 ,  H03F1/34

CPC classification number: H03F3/303 ,  G09G2310/0291 ,  G09G2320/0252 ,  G09G2330/021 ,  H03F3/45219 ,  H03F2203/30015 ,  H03F2203/30021 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03F2203/45244 ,  H03F2203/45274 ,  H03F2203/45512

Abstract: An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit.

Abstract translation: 提供了一种运算放大电路。 运算放大电路包括控制电路，上拉和下拉晶体管，第一和第二偏置电路以及偏置电压产生电路。 控制电路包括第一和第二输入端，并且被配置为当输入电压转变到第一电平时，将上拉节点和下拉节点的电压电平改变到与第一电平不同的第二电平 。 上拉晶体管向输出端提供电源电压。 下拉晶体管将输出端子连接到接地电压。 第一偏置电路向控制电路提供第一偏置电流。 当所述上拉和下拉节点中的至少一个的电压电平达到阈值电压电平时，所述偏置电压产生电路产生偏置电压，并且所述第二偏置电路向所述控制电路提供第二偏置电流。

公开(公告)号：US20170169256A1

公开(公告)日：2017-06-15

申请号：US15432601

申请日：2017-02-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyuck-Jun CHO ,  Donald NA ,  Seung-Hwan BAEK ,  Jae-Keun OH ,  Kee-Moon CHUN

IPC: G06K7/00 ,  G06K19/07

CPC classification number: G06K7/0021 ,  G06F1/00 ,  G06F1/06 ,  G06F1/3287 ,  G06K19/07 ,  G06K19/0701 ,  G06K19/0715 ,  G06Q20/341 ,  Y02D10/171 ,  Y02D50/20

Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.

公开(公告)号：US20240394964A1

公开(公告)日：2024-11-28

申请号：US18669048

申请日：2024-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATION

Inventor： Seung-Hwan BAEK ,  Seokjun CHOI ,  Seungwoo YOON ,  Seungyong LEE ,  Jinwoo PARK ,  Nahyup KANG ,  Jiyeon KIM

IPC: G06T17/00 ,  G06V10/24 ,  G06V10/60

Abstract: A method of determining an illumination pattern includes constructing a dataset by estimating a first surface normal vector of a three-dimensional (3D) object from a first image obtained by capturing the 3D object of which surface normal information is known, the dataset including basis images of the 3D object; generating simulation images in which virtual illumination patterns, obtained based on a combination of the basis images, are applied to the 3D object; estimating a second surface normal vector of the 3D object, by reconstructing a surface normal using a photometric stereo technique based on the virtual illumination patterns and simulation images corresponding to the virtual illumination patterns; and training a neural network to determine an illumination pattern based on a difference between the first surface normal vector and the second surface normal vector.