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公开(公告)号:US20180331119A1
公开(公告)日:2018-11-15
申请号:US16027667
申请日:2018-07-05
发明人: Jung Ho KIM , BiO KIM , Hyung Joon KIM , Young Seon SON , Su Jin SHIN , Jae Young AHN , Ju Mi YUN , HanMei CHOI
IPC分类号: H01L27/11582 , H01L29/792 , H01L21/28 , H01L27/11568 , H01L27/11565
CPC分类号: H01L27/11582 , H01L27/11565 , H01L27/11568 , H01L29/40117 , H01L29/7926
摘要: A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.