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公开(公告)号:US20210013152A1
公开(公告)日:2021-01-14
申请号:US17032916
申请日:2020-09-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Juhyeon OH , Sunchul Kim , Hyunki Kim
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/16
Abstract: A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.
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公开(公告)号:US20230170310A1
公开(公告)日:2023-06-01
申请号:US18103584
申请日:2023-01-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jongwan KIM , Kyong Hwan KOH , Juhyeon OH , Yongkwan LEE
IPC: H01L23/552 , H01L23/498 , H01L21/56
CPC classification number: H01L23/552 , H01L23/49838 , H01L21/568 , H01L23/49816 , H01L2224/16227 , H01L24/16
Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.
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公开(公告)号:US20220392846A1
公开(公告)日:2022-12-08
申请号:US17887557
申请日:2022-08-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Juhyeon OH , Sunchul Kim , Hyunki Kim
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/16
Abstract: A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.
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公开(公告)号:US20240079299A1
公开(公告)日:2024-03-07
申请号:US18125917
申请日:2023-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaekyung YOO , Woohyeong KIM , Jinwoo PARK , Juhyeon OH , Jayeon LEE
IPC: H01L23/498 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/538
CPC classification number: H01L23/49811 , H01L21/4857 , H01L21/56 , H01L23/3128 , H01L23/5383 , H01L24/16 , H01L2224/16227 , H10B80/00
Abstract: A semiconductor package includes a first redistribution wiring layer having a first surface and a second surface opposite to the first surface, the first redistribution wiring layer having protrusions protruding from the first surface and a plurality of first bonding pads provided on the protrusions, a first semiconductor device mounted on the first redistribution wiring layer via conductive bumps, a plurality of conductive structures respectively extending from the first bonding pads around the first semiconductor device, and a second redistribution wiring layer disposed on the conductive structures and electrically connected to the first redistribution wiring layer.
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公开(公告)号:US20220068835A1
公开(公告)日:2022-03-03
申请号:US17212035
申请日:2021-03-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jongwan KIM , Kyong Hwan KOH , Juhyeon OH , Yongkwan LEE
IPC: H01L23/552 , H01L23/498 , H01L21/56
Abstract: A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.
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