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1.发明授权公开(公告)号：US11508664B2
公开(公告)日：2022-11-22
申请号：US16861891
申请日：2020-04-29
发明人： Keunwook Shin , Kibum Kim , Hyunmi Kim , Hyeonjin Shin , Sanghun Lee
IPC分类号： H01L23/538 , H01L29/16 , H01L23/532 , H01L23/00
摘要： An interconnect structure may include a graphene-metal barrier on a substrate and a conductive layer on the graphene-metal barrier. The graphene-metal barrier may include a plurality of graphene layers and metal particles on grain boundaries of each graphene layer between the plurality of graphene layers. The metal particles may be formed at a ratio of 1 atom % to 10 atom % with respect to carbon of the plurality of graphene layers.
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公开(公告)号：US11329223B2
公开(公告)日：2022-05-10
申请号：US17060884
申请日：2020-10-01
发明人： Minhyun Lee , Seongjun Park , Hyunjae Song , Hyeonjin Shin , Kibum Kim , Sanghun Lee , Yunho Kang
IPC分类号： H01L45/00 , H01L21/768 , G11C13/00
摘要： A nonvolatile memory apparatus includes a first electrode, a second electrode separated from the first electrode, a resistive-change material layer provided between the first electrode and the second electrode and configured to store information due to a resistance change caused by an electrical signal applied through the first electrode and the second electrode, and a diffusion prevention layer provided between the first electrode and the resistive-change material layer and/or between the second electrode and the resistive-change material layer and including a two-dimensional (2D) material having a monolayer thickness of about 0.35 nm or less.
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公开(公告)号：US20240243117A1
公开(公告)日：2024-07-18
申请号：US18412177
申请日：2024-01-12
发明人： Yongeun Cho , Eunhee Choi , Kibum Kim , Seonkyeong Kim , Hayoung Kim , Hyunjeong Roh , Moogyu Bae
IPC分类号： H01L27/02 , H01L23/528 , H01L27/092
CPC分类号： H01L27/0207 , H01L23/5286 , H01L27/0928 , H01L27/0924
摘要： An integrated circuit includes a first region having a plurality of first cells arranged in first rows extending in a first direction and a plurality of first gate electrodes extending in a second direction that crosses the first direction, a second region having a plurality of second cells arranged in second rows extending in the first direction and a plurality of second gate electrodes extending in the second direction, and a third region between the first region and the second region and having a plurality of third gate electrodes extending in the second direction. A second height of each of the second rows is greater than a first height of each of the first rows. A pitch of the first gate electrodes, a pitch of the second gate electrodes, and a pitch of the third gate electrodes are the same.
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公开(公告)号：US11556914B2
公开(公告)日：2023-01-17
申请号：US16969345
申请日：2019-03-05
发明人： Kibum Kim
摘要： According to various embodiment of the present invention, an electronic device comprises: an audio module including a speaker and a receiver; a codec circuit for transmitting and receiving an audio signal; a magnetic secure transmission (MST) circuit; a switch unit; a memory; and a processor electrically connected with the audio module, the codec circuit, the MST circuit, the switch unit, and the memory, wherein, if a function for requesting a payment is executed when the codec circuit and the audio module are connected with each other, the processor can be configured to: control the switch unit so as to connect the MST circuit with the speaker and/or the receiver, which are included in the audio module; and transmit the MST signal for the payment by using the speaker and/or the receiver, which are connected with the MST circuit. In addition to various embodiments disclosed in the present invention, other various embodiments are possible.
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公开(公告)号：US10811604B2
公开(公告)日：2020-10-20
申请号：US16144257
申请日：2018-09-27
发明人： Minhyun Lee , Seongjun Park , Hyunjae Song , Hyeonjin Shin , Kibum Kim , Sanghun Lee , Yunho Kang
IPC分类号： H01L45/00 , H01L21/768 , G11C13/00
摘要： A nonvolatile memory apparatus includes a first electrode, a second electrode separated from the first electrode, a resistive-change material layer provided between the first electrode and the second electrode and configured to store information due to a resistance change caused by an electrical signal applied through the first electrode and the second electrode, and a diffusion prevention layer provided between the first electrode and the resistive-change material layer and/or between the second electrode and the resistive-change material layer and including a two-dimensional (2D) material having a monolayer thickness of about 0.35 nm or less.
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公开(公告)号：US20190123273A1
公开(公告)日：2019-04-25
申请号：US16144257
申请日：2018-09-27
发明人： Minhyun Lee , Seongjun Park , Hyunjae Song , Hyeonjin Shin , Kibum Kim , Sanghun Lee , Yunho Kang
IPC分类号： H01L45/00 , H01L21/768 , G11C13/00
摘要： A nonvolatile memory apparatus includes a first electrode, a second electrode separated from the first electrode, a resistive-change material layer provided between the first electrode and the second electrode and configured to store information due to a resistance change caused by an electrical signal applied through the first electrode and the second electrode, and a diffusion prevention layer provided between the first electrode and the resistive-change material layer and/or between the second electrode and the resistive-change material layer and including a two-dimensional (2D) material having a monolayer thickness of about 0.35 nm or less.
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7.发明授权公开(公告)号：US12014991B2
公开(公告)日：2024-06-18
申请号：US17951474
申请日：2022-09-23
发明人： Keunwook Shin , Kibum Kim , Hyunmi Kim , Hyeonjin Shin , Sanghun Lee
IPC分类号： H01L23/538 , H01L23/00 , H01L23/532 , H01L29/16
CPC分类号： H01L23/5386 , H01L23/53204 , H01L23/5329 , H01L24/19 , H01L29/1606
摘要： An interconnect structure may include a graphene-metal barrier on a substrate and a conductive layer on the graphene-metal barrier. The graphene-metal barrier may include a plurality of graphene layers and metal particles on grain boundaries of each graphene layer between the plurality of graphene layers. The metal particles may be formed at a ratio of 1 atom % to 10 atom % with respect to carbon of the plurality of graphene layers.
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