公开(公告)号：US09935768B2

公开(公告)日：2018-04-03

申请号：US14251120

申请日：2014-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyesoo Lee ,  Jaechul Park ,  Yun-Ho Youm ,  Kyungae Kim ,  TongPyo Hong

IPC: H04L29/06 ,  H04L9/08

CPC classification number: H04L9/0894 ,  H04L9/0869

Abstract: A system on chip includes a central processing unit and a key manager coupled to the central processing unit. The key manager includes a random number generator configured to generate a key and a key memory configured to store the key and a user setting value associated with the key.

公开(公告)号：US12177324B2

公开(公告)日：2024-12-24

申请号：US18244107

申请日：2023-09-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Yun Park ,  Kyungho Ryu ,  Kilhoon Lee ,  Hyunwook Lim ,  Youngmin Choi ,  Kyungae Kim

IPC: H04L69/324 ,  H04L47/43

Abstract: Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.

公开(公告)号：US11758030B2

公开(公告)日：2023-09-12

申请号：US17679412

申请日：2022-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Yun Park ,  Kyungho Ryu ,  Kilhoon Lee ,  Hyunwook Lim ,  Youngmin Choi ,  Kyungae Kim

IPC: H04L69/324 ,  H04L47/43

CPC classification number: H04L69/324 ,  H04L47/43

Abstract: Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.