公开(公告)号：US20210028836A1

公开(公告)日：2021-01-28

申请号：US16814275

申请日：2020-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： EUN SUNG JEON ,  MIN KI AHN ,  WOOK BONG LEE ,  SUNG SOO KIM ,  JOON SUK KIM

IPC: H04B7/0456 ,  H04B7/06 ,  H04B7/0452 ,  H04L1/00 ,  H04B17/336

Abstract: Provided is method for generating precoder in a Multi User Multiple Input and Multiple Output (MU MIMO) communication system. The method involves receiving channel information and quality information of a channel from a plurality of stations. It is determined whether a first condition is satisfied on the basis of the received information, if so, a type of matrix inversion is selected from among a plurality of matrix inversion types for precoding. It is determined whether a second condition is satisfied on the basis of the provided information, and a type of decomposition from a plurality of decomposition types for precoding is selected if the second condition is satisfied. A precoder is generated on the basis of the selected result.

公开(公告)号：US20220131581A1

公开(公告)日：2022-04-28

申请号：US17647194

申请日：2022-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： EUN SUNG JEON ,  MIN KI AHN ,  WOOK BONG LEE ,  SUNG SOO KIM ,  JOON SUK KIM

IPC: H04B7/0456 ,  H04B7/06 ,  H04B17/336 ,  H04L1/00 ,  H04B7/0452

Abstract: Provided is method for generating a precoder in a Multi User Multiple Input and Multiple Output (MU MIMO) communication system. The method involves receiving channel information and quality information of a channel from a plurality of stations. It is determined whether a first condition is satisfied on the basis of the received information, if so, a type of matrix inversion is selected from among a plurality of matrix inversion types for precoding. It is determined whether a second condition is satisfied on the basis of the provided information, and a type of decomposition from a plurality of decomposition types for precoding is selected if the second condition is satisfied. A precoder is generated on the basis of the selected result.

公开(公告)号：US20230352526A1

公开(公告)日：2023-11-02

申请号：US18350187

申请日：2023-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYUHWAN AHN ,  SUNG SOO KIM ,  CHAEHO NA ,  WOONGSIK NAM ,  DONGHYUN ROH

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L27/088

CPC classification number: H01L29/0653 ,  H01L29/0847 ,  H01L29/7851 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/02603 ,  H01L21/02532 ,  H01L21/76229 ,  H01L21/823431 ,  H01L21/823418 ,  H01L21/823481 ,  H01L21/823475 ,  H01L21/823412 ,  H01L29/66795 ,  H01L27/0886

Abstract: A semiconductor device includes first and second active patterns on a substrate, the first and second active patterns adjacent to each other in a first direction with a first trench between the first and second active patterns, third and fourth active patterns on the substrate, the third and fourth active patterns adjacent to each other in the first direction with a second trench between the third and fourth active patterns. The semiconductor device includes a first device isolation layer in the first trench, and a second device isolation layer in the second trench. A width of the second trench in the first direction is greater than a width of the first trench in the first direction. The second device isolation layer includes a first protrusion and a second protrusion which protrude from a top surface of the second device isolation layer.

公开(公告)号：US20220173212A1

公开(公告)日：2022-06-02

申请号：US17667996

申请日：2022-02-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYUHWAN AHN ,  SUNG SOO KIM ,  CHAEHO NA ,  WOONGSIK NAM ,  DONGHYUN ROH

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66 ,  H01L27/088

Abstract: A semiconductor device includes first and second active patterns on a substrate, the first and second active patterns adjacent to each other in a first direction with a first trench between the first and second active patterns, third and fourth active patterns on the substrate, the third and fourth active patterns adjacent to each other in the first direction with a second trench between the third and fourth active patterns. The semiconductor device includes a first device isolation layer in the first trench, and a second device isolation layer in the second trench. A width of the second trench in the first direction is greater than a width of the first trench in the first direction. The second device isolation layer includes a first protrusion and a second protrusion which protrude from a top surface of the second device isolation layer.

公开(公告)号：US20210067235A1

公开(公告)日：2021-03-04

申请号：US16856215

申请日：2020-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUN BAE JEON ,  JUN HA IM ,  HYEON CHEOL JEONG ,  SUNG SOO KIM

IPC: H04B7/08 ,  H04L27/26

Abstract: A communication receiving device is provided. The communication receiving device includes a cross-correlation measuring circuit which receives an L-SIG (Legacy signal) symbol and a RL-SIG symbol to measure a cross-correlation degree therebetween, an accumulating circuit which accumulates a real part of a cross-correlation degree measurement value, a comparator which compares the accumulated L-SIG symbol and the RL-SIG symbol with a variable threshold value, and a threshold value calculator for calculating the threshold value.

公开(公告)号：US20220199789A1

公开(公告)日：2022-06-23

申请号：US17406310

申请日：2021-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG SOO KIM ,  JOOHAN KIM ,  GYUHWAN AHN ,  IK SOO KIM ,  JONGMIN BAEK

IPC: H01L29/417 ,  H01L29/786 ,  H01L29/423

Abstract: A semiconductor device includes a first active pattern disposed on a substrate, a device isolation layer filling a trench that defines the first active pattern, a first channel pattern and a first source/drain pattern disposed on the first active pattern in which the first channel pattern includes semiconductor patterns stacked and spaced apart from each other, a gate electrode that extends and runs across the first channel pattern, a gate dielectric layer disposed between the first channel pattern and the gate electrode, and a first passivation pattern disposed between the device isolation layer and a first sidewall of the first active pattern. The first passivation pattern includes an upper part that protrudes upwardly from the device isolation layer, and a lower part buried in the device isolation layer. The gate dielectric layer covers the upper part of the first passivation pattern.

公开(公告)号：US20210118991A1

公开(公告)日：2021-04-22

申请号：US16903015

申请日：2020-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYUHWAN AHN ,  SUNG SOO KIM ,  CHAEHO NA ,  WOONGSIK NAM ,  DONGHYUN ROH

IPC: H01L29/06 ,  H01L27/088 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/66

Abstract: A semiconductor device includes first and second active patterns on a substrate, the first and second active patterns adjacent to each other in a first direction with a first trench between the first and second active patterns, third and fourth active patterns on the substrate, the third and fourth active patterns adjacent to each other in the first direction with a second trench between the third and fourth active patterns. The semiconductor device includes a first device isolation layer in the first trench, and a second device isolation layer in the second trench. A width of the second trench in the first direction is greater than a width of the first trench in the first direction. The second device isolation layer includes a first protrusion and a second protrusion which protrude from a top surface of the second device isolation layer.

公开(公告)号：US20200321241A1

公开(公告)日：2020-10-08

申请号：US16831500

申请日：2020-03-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHAE HO NA ,  SUNG SOO KIM ,  GYU HWAN AHN ,  DONG HYUN ROH

IPC: H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.