公开(公告)号：US20240222468A1

公开(公告)日：2024-07-04

申请号：US18384008

申请日：2023-10-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Se Woung OH ,  Hyung Dong KIM ,  Sang Mo KOO ,  Han Sung KIM ,  Young Dae CHO

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/66439 ,  H01L29/0673 ,  H01L29/401 ,  H01L29/4175 ,  H01L29/42392 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

Abstract: A method for fabricating a semiconductor device includes forming an active pattern on a substrate, forming sacrificial and semiconductor layers alternately stacked on the active pattern, forming a dummy gate and first source/drain trench on one side of the dummy gate by etching the stacked structure, forming a second source/drain trench on the active pattern by etching a sidewall of the sacrificial layer exposed to the first source/drain trench, forming a first inner spacer material layer along sidewall and bottom surfaces of the second source/drain trench, forming a second inner spacer material layer by anisotropic etching a first inner spacer material layer, and forming a third source/drain trench on the active pattern by isotropic etching.