公开(公告)号：US11778807B2

公开(公告)日：2023-10-03

申请号：US17371452

申请日：2021-07-09

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jungwoo Song ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

IPC分类号： H01L29/06 ,  H10B12/00 ,  H01L23/532 ,  H10B61/00 ,  H10B63/00 ,  H10N59/00

CPC分类号： H10B12/30 ,  H01L23/5329 ,  H01L29/0649 ,  H10B12/315 ,  H10B12/482 ,  H10B12/485 ,  H10B61/00 ,  H10B63/00 ,  H10N59/00

摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

公开(公告)号：US11114440B2

公开(公告)日：2021-09-07

申请号：US16805066

申请日：2020-02-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jungwoo Song ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

IPC分类号： H01L21/768 ,  H01L27/108 ,  H01L29/06 ,  H01L23/532 ,  H01L27/24 ,  H01L27/22

摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

公开(公告)号：US10665592B2

公开(公告)日：2020-05-26

申请号：US16108786

申请日：2018-08-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jungwoo Song ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

IPC分类号： H01L29/06 ,  H01L27/108 ,  H01L23/532 ,  H01L27/24 ,  H01L27/22

摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

公开(公告)号：US20190164975A1

公开(公告)日：2019-05-30

申请号：US16108786

申请日：2018-08-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： JUNGWOO SONG ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

IPC分类号： H01L27/108 ,  H01L23/532 ,  H01L29/06

摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.