Abstract:
An image forming apparatus includes an engine unit to perform an image forming job; an engine control unit to control the operation of the engine unit; a brushless direct current (BLDC) motor to drive the engine unit; a sensor unit to sense electric angle information and driving velocity information of the BLDC motor; a communication interface to receive a digital control command with respect to the BLDC motor from the engine control unit; a driving signal unit to generate a driving signal to control the BLDC motor; and a digital control unit to control the operation of the driving signal unit in a digital phase locked loop (PLL) manner for feedback controls the BLDC motor, based on the received digital control command, the detected electric angle information and the driving velocity information and a digital gain value as a control factor with respect to the BLDC motor.
Abstract:
A semiconductor package includes a master chip and a slave chip stacked on a substrate. The master chip and the slave chip are connected to one another by a bonding wire. The master chip and the slave chip are connected in series with an external circuit. The semiconductor package may have a low loading factor and excellent performance, and may be mass produced at low costs.