公开(公告)号：US20160307755A1

公开(公告)日：2016-10-20

申请号：US15064628

申请日：2016-03-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehee KIM ,  Dae-Yong KANG ,  SoonMok HA ,  Joonsoo PARK

IPC: H01L21/033 ,  H01L21/768

CPC classification number: H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/76816 ,  H01L21/76877 ,  H01L27/10852 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11582

Abstract: A method for forming fine patterns includes patterning a hard mask layer on an etch target layer to form sacrificial pillars and a first opening disposed between the sacrificial pillars and exposing the etch target layer, forming a block copolymer layer on the etch target layer exposed through the first opening, phase-separating the block copolymer layer to form first block patterns spaced apart from the sacrificial pillars and a second block pattern, forming first holes by etching the etch target layer exposed by removing the first block patterns, and forming second holes in the etch target layer exposed by removing the sacrificial pillars, the second holes being different from the first holes.

Abstract translation: 用于形成精细图案的方法包括图案化蚀刻目标层上的硬掩模层以形成牺牲柱，以及设置在牺牲柱之间并暴露蚀刻目标层的第一开口，在蚀刻目标层上形成嵌段共聚物层， 第一开口，相分离嵌段共聚物层以形成与牺牲柱间隔开的第一嵌段图案和第二嵌段图案，通过蚀刻通过去除第一嵌段图案而暴露的蚀刻目标层来形成第一孔，以及在第 通过去除牺牲柱而暴露的蚀刻目标层，第二孔不同于第一孔。

公开(公告)号：US20170053920A1

公开(公告)日：2017-02-23

申请号：US15230585

申请日：2016-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heejung KIM ,  Seok-Won CHO ,  Joonsoo PARK ,  SoonMok HA

IPC: H01L27/108

CPC classification number: H01L27/10894 ,  H01L27/11582 ,  H01L28/00

Abstract: A method of fabricating a semiconductor device includes forming first cell patterns on a substrate, forming a first layer relative to the first cell patterns, and forming a second cell pattern and a peripheral pattern on the first layer. The second cell pattern includes first holes in a cell region and the peripheral pattern is located in a peripheral region. The method also includes filling the first holes, removing the second cell pattern to expose pillars, and forming second holes. Each of the second holes corresponds to adjacent cell spacers of the pillars. The method also includes removing the pillars to form third holes corresponding to respective ones of the cell spacers, and etching the substrate using the cell spacers, the first cell patterns, and the peripheral pattern as etch masks to form a trench.

Abstract translation: 制造半导体器件的方法包括在衬底上形成第一单元图形，相对于第一单元图案形成第一层，并在第一层上形成第二单元图案和周边图案。 第二单元图案包括单元区域中的第一孔，并且外围图案位于周边区域中。 该方法还包括填充第一孔，去除第二细胞图案以暴露柱，以及形成第二孔。 每个第二孔对应于柱的相邻电池间隔件。 该方法还包括移除柱以形成对应于各个单元间隔物的第三孔，以及使用电池间隔物，第一电池图案和外围图案作为蚀刻掩模蚀刻衬底以形成沟槽。