公开(公告)号：US11936409B2

公开(公告)日：2024-03-19

申请号：US17683476

申请日：2022-03-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulwoo Kim ,  Jonghyuck Choi ,  Seungwoo Park ,  Hyun Woo Cho ,  Tae-Jin Kim ,  Jae Suk Yu ,  Kil Hoon Lee ,  Young Hwan Chang

IPC: H04B1/04 ,  H04L25/03

CPC classification number: H04B1/04 ,  H04L25/03057

Abstract: A transmitter and a receiver are provided. The transmitter includes a processing unit configured to receive a clock signal and a data signal, set a value of a consecutive identical digit (CID) value related to the data signal and generate a modulation signal during a unit interval (UI) based on the data signal and the CID value, and a transmitter driver configured to output output signals having different voltage levels during the unit interval by receiving the modulation signal.

公开(公告)号：US11146378B2

公开(公告)日：2021-10-12

申请号：US16889077

申请日：2020-06-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin Kim ,  Jung-Hoon Chun ,  Jae Youl Lee ,  Hyun Wook Lim

IPC: H04B1/10 ,  H04L7/00 ,  H03G3/30 ,  H03K3/037 ,  H03K19/20

Abstract: A signal receiving device may not need to consider jitter characteristics of a received signal by including a transition detecting device which receives first to third input signals having different signal levels for each unit interval, compares whether a signal level of a first differential signal, which is a differential signal between the first input signal and the second input signal among the first to third input signals, is greater than a first reference signal level to output a first comparison signal, and compares whether the signal level of the first differential signal is greater than a second reference signal level different from the first reference signal level to output a second comparison signal, and a clock data recovering device which recovers a clock signal embedded in the first to third input signals on the basis of the first and second comparison signals to output the recovery clock signal.